A 10-GS/s 8-bit 4-way interleaved folding ADC in 0.18 µm SiGe-BiCMOS

DOI Web Site 被引用文献1件 参考文献8件
  • Liu Huasen
    Institute of Microelectronics of Chinese Academy of Sciences University of Chinese Academy of Sciences
  • Wu Danyu
    Institute of Microelectronics of Chinese Academy of Sciences
  • Zhou Lei
    Institute of Microelectronics of Chinese Academy of Sciences
  • Huang Yinkun
    Institute of Microelectronics of Chinese Academy of Sciences
  • Luan Jian
    Institute of Microelectronics of Chinese Academy of Sciences
  • Guo Xuan
    Institute of Microelectronics of Chinese Academy of Sciences
  • Wang Dong
    Institute of Microelectronics of Chinese Academy of Sciences University of Chinese Academy of Sciences
  • Zheng Xuqiang
    Institute of Microelectronics of Chinese Academy of Sciences
  • Wu Jin
    Institute of Microelectronics of Chinese Academy of Sciences
  • Liu Xinyu
    Institute of Microelectronics of Chinese Academy of Sciences

説明

<p>In this paper, a time-interleaved 10-GS/s 8-bit analog-to-digital converter (ADC) fabricated in 0.18 µm SiGe BiCMOS technology has been demonstrated. A 4 × 4 input multiplexer with good isolation and wide input bandwidth is proposed, which enables the ADC to support 1/2/4-channel sampling modes. In the track-and-hold (THA) stage, a switched emitter follower (SEF) topology with delayed dummy clock is introduced to minimize the overshoot effect of the SEF output. The ADC achieves spurious free dynamic range (SFDR) > 52 dBc and effective number of bits (ENOB) > 6.8 in low input frequencies. The analog input bandwidth is 5.6 GHz.</p>

収録刊行物

  • IEICE Electronics Express

    IEICE Electronics Express 16 (3), 20181079-20181079, 2019

    一般社団法人 電子情報通信学会

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