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ORCIDNorbert Wehn
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- affiliation: University of Kaiserslautern, Germany
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2020 – today
- 2025
[j64]Bilal Hammoud
, Charbel Bou-Mosleh, Norbert Wehn:
DATE on the Edge: On-Site Oil Spill Detection and Thickness Estimation Using Drone-Based Radar Backscattering. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 18: 523-536 (2025)- [j63]Andreas Zunker, Marvin Geiselhart, Lucas Johannsen, Claus Kestel, Stephan ten Brink, Timo Vogt, Norbert Wehn:
Row-Merged Polar Codes: Analysis, Design, and Decoder Implementation. IEEE Trans. Commun. 73(1): 39-53 (2025) - 2024
- [j62]Jianming Yi, Kalyani Suresh, Ali Moghiseh, Norbert Wehn:
Variational Quantum Linear Solver Enhanced Quantum Support Vector Machine. Adv. Artif. Intell. Mach. Learn. 4(2): 2164-2187 (2024) - [j61]Oliver Griebel, Bilal Hammoud, Norbert Wehn:
Adaptive Sliding Window Decoding of Spatially Coupled Low-Density Parity-Check Codes: Algorithms and Energy Efficient Implementations. IEEE Access 12: 191140-191161 (2024) - [j60]Mohammad Hassani Sadi, Chirag Sudarshan, Norbert Wehn:
Novel adaptive quantization methodology for 8-bit floating-point DNN training. Des. Autom. Embed. Syst. 28(2): 91-110 (2024) - [j59]Claus Kestel, Lucas Johannsen, Norbert Wehn:
High-Throughput Polar Code Decoders with Information Bottleneck Quantization. Entropy 26(6): 462 (2024) - [j58]Sisi Miao, Claus Kestel, Lucas Johannsen, Marvin Geiselhart, Laurent Schmalen, Alexios Balatsoukas-Stimming, Gianluigi Liva, Norbert Wehn, Stephan ten Brink:
Trends in Channel Coding for 6G. Proc. IEEE 112(7): 653-675 (2024) - [c280]Jan Lappas, Mohamed Amine Riahi, Christian Weis, Norbert Wehn, Sani R. Nassif:
Timing Analysis beyond Complementary CMOS Logic Styles. ASPDAC 2024: 189-194 - [c279]Lukas Steiner, Timo Lehnigk-Emden, Markus Fehrenz, Norbert Wehn:
A Mapping of Triangular Block Interleavers to DRAM for Optical Satellite Communication. DATE 2024: 1-2 - [c278]Jonas Ney, Norbert Wehn:
Achieving High Throughput with a Trainable Neural-Network-Based Equalizer for Communications on FPGA. DSD 2024: 106-113 - [c277]Luca Parrini, Taha Soliman, Benjamin Hettwer, Jan Micha Borrmann, Simranjeet Singh, Ankit Bende, Vikas Rana, Farhad Merchant, Norbert Wehn:
Error Detection and Correction Codes for Safe In-Memory Computations. ETS 2024: 1-4 - [c276]Bilal Hammoud, Jonas Ney, Charbel Bou-Mosleh, Norbert Wehn:
FPGA Onboard Processing of Tiny-ML Models Using Radar-Sensing for Oil Spill Monitoring. IGARSS 2024: 6339-6342 - [c275]Bilal Hammoud, Norbert Wehn:
Radar Backscattering Sensitivity to Emulsions Using Spectral Analysis from Nadir-Aerial Response Systems. IGARSS 2024: 6542-6545 - [c274]Zhe Zhang, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif:
Do Radiation and Aging Impact DVFS? TCAD-based Analysis on 22 nm FDSOI Latches. IOLTS 2024: 1-6 - [c273]André Lucas Chinazzo, Norbert Wehn, Sani R. Nassif:
Enabling cell selection optimization for non-traditional CMOS topologies. ISOCC 2024: 139-140 - [c272]Jan Lappas, Norbert Wehn, Sani R. Nassif:
Timing Analysis with Analytical Sensitivity. ISOCC 2024: 400-401 - [c271]Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian:
Testing for aging in advanced SRAM: From front end of the line transistors to back end of the line interconnects. ITC 2024: 46-50 - [c270]Derek Christ, Lukas Steiner, Matthias Jung, Norbert Wehn:
PIMSys: A Virtual Prototype for Processing in Memory. MEMSYS 2024: 26-33 - [c269]Mohammadreza Esmaeilpour, Jan Lappas, Hussien Abdo, Christian Weis, Norbert Wehn:
A 5 Gb/s Low-Power Receiver with a Novel Data Sampling Method for LPDDR Interfaces. NewCAS 2024: 55-59 - [c268]Mohammadreza Esmaeilpour, Jan Lappas, Christian Weis, Norbert Wehn:
A 10 Gb/s Low-Power Single-Ended Linear Equalizer for DRAM Interfaces. NorCAS 2024: 1-6 - [c267]Vincent Lauinger, Patrick Matalla, Jonas Ney, Norbert Wehn, Sebastian Randel, Laurent Schmalen:
Fully-blind Neural Network Based Equalization for Severe Nonlinear Distortions in 112 Gbit/s Passive Optical Networks. OFC 2024: 1-3 - [c266]Mohammadreza Esmaeilpour, Jan Lappas, Christian Weis, Norbert Wehn:
A Low-Power Linear Phase Interpolation-Based Delay Line in 12nm FinFET Technology. VLSI-SoC 2024: 1-5 - [c265]Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian:
Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management. VTS 2024: 1-5 - [i31]Vincent Lauinger, Patrick Matalla, Jonas Ney, Norbert Wehn, Sebastian Randel, Laurent Schmalen:
Fully-blind Neural Network Based Equalization for Severe Nonlinear Distortions in 112 Gbit/s Passive Optical Networks. CoRR abs/2401.09579 (2024) - [i30]Steffen Steinert, Lars Krupp, Karina E. Avila, Anke S. Janssen, Verena Ruf, David Dzsotjan, Christian de Schryver, Jakob Karolus, Stefan Ruzika, Karen Joisten, Paul Lukowicz, Jochen Kuhn, Norbert Wehn, Stefan Küchemann:
Lessons Learned from Designing an Open-Source Automated Feedback System for STEM Education. CoRR abs/2401.10531 (2024) - [i29]Jonas Ney, Patrick Matalla, Vincent Lauinger, Laurent Schmalen, Sebastian Randel, Norbert Wehn:
Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications. CoRR abs/2402.15288 (2024) - [i28]Luca Parrini, Taha Soliman, Benjamin Hettwer, Jan Micha Borrmann, Simranjeet Singh, Ankit Bende, Vikas Rana, Farhad Merchant, Norbert Wehn:
Error Detection and Correction Codes for Safe In-Memory Computations. CoRR abs/2404.09818 (2024) - [i27]Jonas Ney, Christoph Füllner, Vincent Lauinger, Laurent Schmalen, Sebastian Randel, Norbert Wehn:
CNN-Based Equalization for Communications: Achieving Gigabit Throughput with a Flexible FPGA Hardware Architecture. CoRR abs/2405.02323 (2024) - [i26]Claus Kestel, Lucas Johannsen, Norbert Wehn:
High Throughput Polar Code Decoders with Information Bottleneck Quantization. CoRR abs/2406.01426 (2024) - [i25]Laurent Schmalen, Vincent Lauinger, Jonas Ney, Norbert Wehn, Patrick Matalla, Sebastian Randel, Alexander von Bank, Eike-Manuel Edelmann:
Recent Advances on Machine Learning-aided DSP for Short-reach and Long-haul Optical Communications. CoRR abs/2411.10101 (2024) - 2023
- [j57]Hirra Anwar, Saad Ullah Khan, Muhammad Mohsin Ghaffar, Muhammad Fayyaz, Muhammad Jawad Khan, Christian Weis, Norbert Wehn, Faisal Shafait:
The NWRD Dataset: An Open-Source Annotated Segmentation Dataset of Diseased Wheat Crop. Sensors 23(15): 6942 (2023) - [c264]Gia Bao Thieu, Sven Gesper, Guillermo Payá Vayá, Christoph Riggers, Oliver Renke, Till Fiedler, Jakob Marten, Tobias Stuckenberg, Holger Blume, Christian Weis, Lukas Steiner, Chirag Sudarshan, Norbert Wehn, Lennart M. Reimann, Rainer Leupers, Michael Beyer, Daniel Köhler, Alisa Jauch, Jan Micha Borrmann, Setareh Jaberansari, Tim Berthold, Meinolf Blawat, Markus Kock, Gregor Schewior, Jens Benndorf, Frederik Kautz, Hans-Martin Blüthgen, Christian Sauer:
ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving. DATE 2023: 1-6 - [c263]Jonas Ney, Vincent Lauinger, Laurent Schmalen, Norbert Wehn:
Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation. EuCNC/6G Summit 2023: 60-65 - [c262]Lukas Steiner, Gustavo Delazeri, Iron Prando da Silva, Matthias Jung, Norbert Wehn:
Automatic DRAM Subsystem Configuration with irace. DroneSE/RAPIDO@HiPEAC 2023: 66-72 - [c261]Nellie Laleni, Taha Soliman, Cecilia De la Parra, Franz Müller, Tobias Kirchner, Andre Guntoro, Thomas Kämpfe, Norbert Wehn, T. Jang:
Torwards Variability Immune Scalable FeFET-based Macros for IMC DNN Accelerators. ICECS 2023: 1-4 - [c260]Bilal Hammoud, Charbel Bou-Mosleh, Mohamed Moursi, Norbert Wehn:
Oil Spill Detection in Calm Ocean Conditions: A U-Net Model Novel Solution. IGARSS 2023: 4658-4661 - [c259]Bilal Hammoud, Norbert Wehn:
A Novel Iterative Estimation Technique Using Radar Sensing to Remotely Characterize Oil Slicks During Spills. IGARSS 2023: 4662-4665 - [c258]Z. Zhang, Zhihang Wu, Christian Weis, Norbert Wehn, Mehdi Baradaran Tahoori:
A Learning-Based Approach for Single Event Transient Analysis in Pass Transistor Logic. IOLTS 2023: 1-7 - [c257]Oliver Griebel, Matthias Herrmann, Bilal Hammoud, Norbert Wehn:
Energy-Efficient Decoding of Spatially Coupled Low-Density Parity-Check Codes using Adaptive Window Sizes. ISTC 2023: 1-5 - [c256]Lucas Johannsen, Claus Kestel, Marvin Geiselhart, Timo Vogt, Stephan ten Brink, Norbert Wehn:
Successive Cancellation Automorphism List Decoding of Polar Codes. ISTC 2023: 1-5 - [c255]Johannes Feldmann, Lukas Steiner, Derek Christ, Thomas Psota, Matthias Jung, Norbert Wehn:
A Precise Measurement Platform for LPDDR4 Memories. MEMSYS 2023: 17:1-17:8 - [c254]Jonas Ney, Christoph Füllner, Vincent Lauinger, Laurent Schmalen, Sebastian Randel, Norbert Wehn:
From Algorithm to Implementation: Enabling High-Throughput CNN-Based Equalization on FPGA for Optical Communications. SAMOS 2023: 158-173 - [i24]Maximilian Schöffel, Johannes Feldmann, Norbert Wehn:
Code-based Cryptography in IoT: A HW/SW Co-Design of HQC. CoRR abs/2301.04888 (2023) - [i23]Claus Kestel, Marvin Geiselhart, Lucas Johannsen, Stephan ten Brink, Norbert Wehn:
Automorphism Ensemble Polar Code Decoders for 6G URLLC. CoRR abs/2303.01235 (2023) - [i22]Jonas Ney, Bilal Hammoud, Norbert Wehn:
A Hybrid Approach combining ANN-based and Conventional Demapping in Communication for Efficient FPGA-Implementation. CoRR abs/2304.05042 (2023) - [i21]Jonas Ney, Vincent Lauinger, Laurent Schmalen, Norbert Wehn:
Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation. CoRR abs/2304.06987 (2023) - [i20]Lucas Johannsen, Claus Kestel, Marvin Geiselhart, Timo Vogt, Stephan ten Brink, Norbert Wehn:
Successive Cancellation Automorphism List Decoding of Polar Codes. CoRR abs/2306.16245 (2023) - [i19]Jianming Yi, Kalyani Suresh, Ali Moghiseh, Norbert Wehn:
Variational Quantum Linear Solver enhanced Quantum Support Vector Machine. CoRR abs/2309.07770 (2023) - [i18]Maximilian Schöffel, Johannes Feldmann, Norbert Wehn:
Efficient Hardware Implementation of Constant Time Sampling for HQC. CoRR abs/2309.16493 (2023) - [i17]Lukas Steiner, Timo Lehnigk-Emden, Markus Fehrenz, Norbert Wehn:
A Mapping of Triangular Block Interleavers to DRAM for Optical Satellite Communication. CoRR abs/2312.02241 (2023) - [i16]Andreas Zunker, Marvin Geiselhart, Lucas Johannsen, Claus Kestel, Stephan ten Brink, Timo Vogt, Norbert Wehn:
Row-Merged Polar Codes: Analysis, Design and Decoder Implementation. CoRR abs/2312.14749 (2023) - 2022
- [j56]Matthias Herrmann, Norbert Wehn:
Beyond 100 Gbit/s Pipeline Decoders for Spatially Coupled LDPC Codes. EURASIP J. Wirel. Commun. Netw. 2022(1): 90 (2022) - [j55]Tobias Monsees, Oliver Griebel, Matthias Herrmann, Dirk Wübben, Armin Dekorsy, Norbert Wehn:
Minimum-Integer Computation Finite Alphabet Message Passing Decoder: From Theory to Decoder Implementations towards 1 Tb/s. Entropy 24(10): 1452 (2022) - [j54]Chirag Sudarshan, Taha Soliman, Jan Lappas, Christian Weis, Mohammad Hassani Sadi, Matthias Jung, Andre Guntoro, Norbert Wehn:
A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 367-380 (2022) - [j53]Lukas Steiner, Matthias Jung, Felipe S. Prado, Kirill Bykov, Norbert Wehn:
DRAMSys4.0: An Open-Source Simulation Framework for In-depth DRAM Analyses. Int. J. Parallel Program. 50(2): 217-242 (2022) - [j52]Cecilia De la Parra, Taha Soliman, Andre Guntoro, Akash Kumar, Norbert Wehn:
Increasing Throughput of In-Memory DNN Accelerators by Flexible Layerwise DNN Approximation. IEEE Micro 42(6): 17-24 (2022) - [j51]Sebastian Kapp, Frederik Lauer, Fabian Beil, Carl Christian Rheinländer, Norbert Wehn, Jochen Kuhn:
Smart Sensors for Augmented Electrical Experiments. Sensors 22(1): 256 (2022) - [j50]Bilal Hammoud, Georges Daou, Norbert Wehn:
Multidimensional Minimum Euclidean Distance Approach Using Radar Reflectivities for Oil Slick Thickness Estimation. Sensors 22(4): 1431 (2022) - [j49]Maximilian Schöffel, Frederik Lauer, Carl Rheinländer, Norbert Wehn:
Secure IoT in the Era of Quantum Computers - Where Are the Bottlenecks? Sensors 22(7): 2484 (2022) - [j48]Mojtaba Mahdavi, Stefan Weithoffer, Matthias Herrmann, Liang Liu, Ove Edfors, Norbert Wehn, Michael Lentmaier:
Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs. IEEE Trans. Circuits Syst. I Regul. Pap. 69(5): 1962-1975 (2022) - [j47]Taha Soliman, Nellie Laleni, Tobias Kirchner, Franz Müller, Ashish Shrivastava, Thomas Kämpfe, Andre Guntoro, Norbert Wehn:
FELIX: A Ferroelectric FET Based Low Power Mixed-Signal In-Memory Architecture for DNN Acceleration. ACM Trans. Embed. Comput. Syst. 21(6): 84:1-84:25 (2022) - [j46]Vladimir Rybalkin, Jonas Ney, Menbere Kina Tekleyohannes, Norbert Wehn:
When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. ACM Trans. Reconfigurable Technol. Syst. 15(1): 2:1-2:35 (2022) - [c253]Jan Lappas, André Lucas Chinazzo, Christian Weis, Chenyang Xia, Zhihang Wu, Leibin Ni, Norbert Wehn:
Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node. DATE 2022: 1083-1084 - [c252]Zhe Zhang, Jan Lappas, André Lucas Chinazzo, Christian Weis, Zhihang Wu, Leibin Ni, Norbert Wehn, Mehdi B. Tahoori:
Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. ETS 2022: 1-4 - [c251]Bilal Hammoud, Charbel Bou-Mosleh, Jonas Ney, Norbert Wehn:
Artificial Neural Networks-Based Radar Remote Sensing to Estimate Geographical Information during Oil-Spills. EUSIPCO 2022: 1801-1805 - [c250]Jonas Ney, Sebastian Dörner, Matthias Herrmann, Mohammad Hassani Sadi, Jannis Clausius, Stephan ten Brink, Norbert Wehn:
FPGA-based Trainable Autoencoder for Communication Systems. FPGA 2022: 154 - [c249]Vincent Lauinger, Manuel Hoffmann, Jonas Ney, Norbert Wehn, Laurent Schmalen:
Blind and Channel-agnostic Equalization Using Adversarial Networks. GLOBECOM 2022: 585-590 - [c248]Hamraz Javaheri, Frederik Lauer, Luisa Lauer, Kristin Altmeyer, Roland Brünken, Markus Peschel, Norbert Wehn, Paul Lukowicz:
Smart Teaching Materials with Real-Time Augmented Reality Support for Introductory Physics Education. UbiComp/ISWC Adjunct 2022: 53-54 - [c247]André Lucas Chinazzo, Jan Lappas, Christian Weis, Qinhui Huang, Zhihang Wu, Leibin Ni, Norbert Wehn:
Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology. ICECS 2022 2022: 1-4 - [c246]Frederik Lauer, Maximilian Schöffel, Carl Christian Rheinländer, Norbert Wehn:
Exploration of Thermoelectric Energy Harvesting for Secure, TLS-Based Industrial IoT Nodes. ICIOT 2022: 92-107 - [c245]Bilal Hammoud, Norbert Wehn:
A Maximum A-Posteriori Probabilistic Approach using UAV-Nadir-Looking Wide-Band Radar for Remote Sensing Oil-Spill Detection. IGARSS 2022: 7823-7826 - [c244]Jonas Ney, Bilal Hammoud, Norbert Wehn:
A Hybrid Approach combining ANN-based and Conventional Demapping in Communication for Efficient FPGA-Implementation. IPDPS Workshops 2022: 92-95 - [c243]Chirag Sudarshan, Mohammad Hassani Sadi, Christian Weis, Norbert Wehn:
Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training. ISCAS 2022: 1472-1476 - [c242]Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn:
A Framework for Formal Verification of DRAM Controllers. MEMSYS 2022: 6:1-6:7 - [c241]Lukas Steiner, Matthias Jung, Michael Huonker, Norbert Wehn:
Unveiling the Real Performance of LPDDR5 Memories. MEMSYS 2022: 9:1-9:3 - [c240]Chirag Sudarshan, Mohammad Hassani Sadi, Lukas Steiner, Christian Weis, Norbert Wehn:
A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions. SAMOS 2022: 362-379 - [c239]Claus Kestel, Christoph Frisch, Michael Pehl, Norbert Wehn:
Towards More Secure PUF Applications: A Low-Area Polar Decoder Implementation. SOCC 2022: 1-6 - [c238]Taha Soliman, Amro Eldebiky, Cecilia De la Parra, Andre Guntoro, Norbert Wehn:
Efficient Hardware Approximation for Bit-Decomposition Based Deep Neural Network Accelerators. SOCC 2022: 1-6 - [c237]Tobias Monsees, Dirk Wübben, Armin Dekorsy, Oliver Griebel, Matthias Herrmann, Norbert Wehn:
Finite-Alphabet Message Passing using only Integer Operations for Highly Parallel LDPC Decoders. SPAWC 2022: 1-5 - [c236]Chirag Sudarshan, Taha Soliman, Thomas Kämpfe, Christian Weis, Norbert Wehn:
FeFET versus DRAM based PIM Architectures: A Comparative Study. VLSI-SoC 2022: 1-6 - [c235]Maximilian Schöffel, Johannes Feldmann, Norbert Wehn:
Code-based Cryptography in IoT: A HW/SW Co-Design of HQC. WF-IoT 2022: 1-7 - [p3]André Lucas Chinazzo, Christian de Schryver, Katharina Anna Zweig, Norbert Wehn:
Increasing the Sampling Efficiency for the Link Assessment Problem. Algorithms for Big Data 2022: 39-56 - [p2]André Lucas Chinazzo, Christian de Schryver, Katharina Anna Zweig, Norbert Wehn:
A Custom Hardware Architecture for the Link Assessment Problem. Algorithms for Big Data 2022: 57-75 - [i15]Vincent Lauinger, Manuel Hoffmann, Jonas Ney, Norbert Wehn, Laurent Schmalen:
Blind and Channel-agnostic Equalization Using Adversarial Networks. CoRR abs/2209.07277 (2022) - [i14]Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn:
A Framework for Formal Verification of DRAM Controllers. CoRR abs/2209.14021 (2022) - [i13]Lukas Steiner, Matthias Jung, Michael Huonker, Norbert Wehn:
Unveiling the Real Performance of LPDDR5 Memories. CoRR abs/2209.14756 (2022) - 2021
- [j45]Deepak M. Mathew, Hammam Kattan, Christian Weis, Jörg Henkel, Norbert Wehn, Hussam Amrouch:
Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling. IEEE Access 9: 83950-83962 (2021) - [j44]Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Javier Alejandro Varela, Norbert Wehn, Andreas Dengel:
iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing. Int. J. Parallel Program. 49(2): 253-284 (2021) - [j43]Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Javier Alejandro Varela, Norbert Wehn, Andreas Dengel:
iDocChip: A Configurable Hardware Accelerator for an End-to-End Historical Document Image Processing. J. Imaging 7(9): 175 (2021) - [j42]Chirag Sudarshan, Lukas Steiner, Matthias Jung, Jan Lappas, Christian Weis, Norbert Wehn:
A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1615-1619 (2021) - [j41]Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng:
Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. 93(12): 1467 (2021) - [c234]Taha Soliman, Cecilia De la Parra, Andre Guntoro, Norbert Wehn:
Adaptable Approximation Based on Bit Decomposition for Deep Neural Network Accelerators. AICAS 2021: 1-4 - [c233]Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro:
A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC 2021: 35-42 - [c232]Matthias Jung, Christian Weis, Norbert Wehn:
The Dynamic Random Access Memory Challenge in Embedded Computing Systems. A Journey of Embedded and Cyber-Physical Systems 2021: 19-36 - [c231]Nosheen Abid, Muhammad Imran Malik, Muhammad Shahzad, Faisal Shafait, Haider Ali, Muhammad Mohsin Ghaffar, Christian Weis, Norbert Wehn, Marcus Liwicki:
Burnt Forest Estimation from Sentinel-2 Imagery of Australia using Unsupervised Deep Learning. DICTA 2021: 1-8 - [c230]Muhammad Gohar Javed, Minahil Raza, Muhammad Mohsin Ghaffar, Christian Weis, Norbert Wehn, Muhammad Shahzad, Faisal Shafait:
QuantYOLO: A High-Throughput and Power-Efficient Object Detection Network for Resource and Power Constrained UAVs. DICTA 2021: 1-8 - [c229]Matthias Herrmann, Norbert Wehn, Max Thalmaier, Markus Fehrenz, Timo Lehnigk-Emden, Matthias Alles:
A 336 Gbit/s Full-Parallel Window Decoder for Spatially Coupled LDPC Codes. EuCNC/6G Summit 2021: 508-513 - [c228]Jonas Ney, Dominik Marek Loroch, Vladimir Rybalkin, Nico Weber, Jens Krüger, Norbert Wehn:
HALF: Holistic Auto Machine Learning for FPGAs. FPL 2021: 363-368 - [c227]Kira Kraft, Norbert Wehn:
ADMM-Based ML Decoding: from Theory to Practice. ICASSP 2021: 8278-8282 - [c226]Maximilian Schöffel, Frederik Lauer, Carl Christian Rheinländer, Norbert Wehn:
On the Energy Costs of Post-Quantum KEMs in TLS-based Low-Power Secure IoT. IoTDI 2021: 158-168 - [c225]Cecilia De la Parra, Ahmed El-Yamany, Taha Soliman, Akash Kumar, Norbert Wehn, Andre Guntoro:
Exploiting Resiliency for Kernel-Wise CNN Approximation Enabled by Adaptive Hardware Design. ISCAS 2021: 1-5 - [c224]Matthias Herrmann, Claus Kestel, Norbert Wehn:
Energy Efficient FEC Decoders. ISTC 2021: 1-5 - [c223]Mojtaba Mahdavi, Liang Liu, Ove Edfors, Michael Lentmaier, Norbert Wehn, Stefan Weithoffer:
Towards Fully Pipelined Decoding of Spatially Coupled Serially Concatenated Codes. ISTC 2021: 1-5 - [c222]Norbert Wehn, Onur Sahin, Matthias Herrmann:
Forward-Error-Correction for Beyond-5G Ultra-High Throughput Communications. ISTC 2021: 1-5 - [c221]Lukas Steiner, Matthias Jung, Norbert Wehn:
Exploration of DDR5 with the Open-Source Simulator DRAMSys. MBMV 2021: 1-11 - [c220]L. J. Gokul Vasan, Éder F. Zulian, Christian Weis, Matthias Jung, Norbert Wehn:
Online Working Set Change Detection with Constant Complexity: The Cornerstone for Memory Management Algorithms in Scalable Systems. MEMSYS 2021: 11:1-11:16 - [c219]Lukas Steiner, Kira Kraft, Denis Uecker, Matthias Jung, Michael Huonker, Norbert Wehn:
An LPDDR4 Safety Model for Automotive Applications. MEMSYS 2021: 12:1-12:9 - [c218]Iris Walter, Jonas Ney, Tim Hotfilter, Vladimir Rybalkin, Julian Höfer, Norbert Wehn, Jürgen Becker:
Embedded Face Recognition for Personalized Services in the Assistive Robotics. PKDD/ECML Workshops (1) 2021: 339-350 - [i12]Jonas Ney, Dominik Marek Loroch, Vladimir Rybalkin, Nico Weber, Jens Krüger, Norbert Wehn:
HALF: Holistic Auto Machine Learning for FPGAs. CoRR abs/2106.14771 (2021) - 2020
- [j40]Carl Christian Rheinländer, Norbert Wehn:
Harvester-aware transient computing: Utilizing the mechanical inertia of kinetic energy harvesters for a proactive frequency-based power loss detection. Integr. 75: 122-130 (2020) - [j39]Mhd Rashed Al Koutayni, Vladimir Rybalkin, Jameel Malik, Ahmed Elhayek, Christian Weis, Gerd Reis, Norbert Wehn, Didier Stricker:
Real-Time Energy Efficient Hand Pose Estimation: A Case Study. Sensors 20(10): 2828 (2020) - [j38]Florian Gensheimer, Tobias Dietz, Kira Kraft, Stefan Ruzika, Norbert Wehn:
A Reduced-Complexity Projection Algorithm for ADMM-Based LP Decoding. IEEE Trans. Inf. Theory 66(8): 4819-4833 (2020) - [j37]Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng:
Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. 92(11): 1219-1245 (2020) - [j36]Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn:
eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. J. Signal Process. Syst. 92(11): 1323-1343 (2020) - [c217]Taha Soliman, Ricardo Olivo, Tobias Kirchner, Cecilia De la Parra, Maximilian Lederer, Thomas Kämpfe, Andre Guntoro, Norbert Wehn:
Efficient FeFET Crossbar Accelerator for Binary Neural Networks. ASAP 2020: 109-112 - [c216]Frederik Lauer, Carl Christian Rheinländer, Claus Kestel, Norbert Wehn:
Analysis and Optimization of TLS-based Security Mechanisms for Low Power IoT Systems. CCGRID 2020: 775-780 - [c215]Johannes Feldmann, Kira Kraft, Lukas Steiner, Norbert Wehn, Matthias Jung:
Fast and Accurate DRAM Simulation: Can we Further Accelerate it? DATE 2020: 364-369 - [c214]Jochen Mades, Gerd Ebelt, Boris Janjic, Frederik Lauer, Carl Christian Rheinländer, Norbert Wehn:
TLS-Level Security for Low Power Industrial IoT Network Infrastructures. DATE 2020: 1720-1721 - [c213]Vladimir Rybalkin, Norbert Wehn:
When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. FPGA 2020: 111-121 - [c212]Stefan Weithoffer, Rami Klaimi, Charbel Abdel Nour, Norbert Wehn, Catherine Douillard:
Fully Pipelined Iteration Unrolled Decoders the Road to TB/S Turbo Decoding. ICASSP 2020: 5115-5119 - [c211]Éder F. Zulian, Christian Weis, Norbert Wehn:
Access-Aware Per-Bank DRAM Refresh for Reduced DRAM Refresh Overhead. ISCAS 2020: 1-5 - [c210]Deepak M. Mathew, Felipe S. Prado, Éder F. Zulian, Christian Weis, Muhammad Mohsin Ghaffar, Matthias Jung, Norbert Wehn:
An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices. MEMSYS 2020: 114-125 - [c209]Sven Müelich, Chirag Sudarshan, Christian Weis, Martin Bossert, Robert F. H. Fischer, Norbert Wehn:
Multi-Valued Physical Unclonable Functions based on Dynamic Random Access Memory. MEMSYS 2020: 126-136 - [c208]Muhammad Mohsin Ghaffar, Chirag Sudarshan, Christian Weis, Matthias Jung, Norbert Wehn:
A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions. MEMSYS 2020: 158-168 - [c207]Marco V. Natale, Matthias Jung, Kira Kraft, Frederik Lauer, Johannes Feldmann, Chirag Sudarshan, Christian Weis, Sven Oliver Krumke, Norbert Wehn:
Efficient Generation of Application Specific Memory Controllers. MEMSYS 2020: 233-247 - [c206]Claus Kestel, Lucas Johannsen, Oliver Griebel, Jhon Jimenez, Timo Vogt, Timo Lehnigk-Emden, Norbert Wehn:
A 506Gbit/s Polar Successive Cancellation List Decoder with CRC. PIMRC 2020: 1-7 - [c205]Stefan Weithoffer, Rami Klaimi, Charbel Abdel Nour, Norbert Wehn, Catherine Douillard:
Low-complexity Computational Units for the Local-SOVA Decoding Algorithm. PIMRC 2020: 1-6 - [c204]Éder F. Zulian, Germain Haugou, Christian Weis, Matthias Jung, Norbert Wehn:
System simulation with PULP virtual platform and SystemC. RAPIDO 2020: 2:1-2:7 - [c203]Jasmin Jahic, Thomas Bauer, Thomas Kuhn, Norbert Wehn, Pablo Oliveira Antonino:
FERA: A Framework for Critical Assessment of Execution Monitoring Based Approaches for Finding Concurrency Bugs. SAI (1) 2020: 54-74 - [c202]Lukas Steiner, Matthias Jung, Felipe S. Prado, Kirill Bykov, Norbert Wehn:
DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator. SAMOS 2020: 110-126 - [c201]Taha Soliman, Ricardo Olivo, Tobias Kirchner, Maximilian Lederer, Thomas Kämpfe, Andre Guntoro, Norbert Wehn:
A Ferroelectric FET Based In-memory Architecture for Multi-Precision Neural Networks. SoCC 2020: 96-101 - [c200]Stefan Weithoffer, Oliver Griebel, Rami Klaimi, Charbel Abdel Nour, Norbert Wehn:
Advanced Hardware Architectures for Turbo Code Decoding Beyond 100 Gb/s. WCNC 2020: 1-6 - [i11]Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian:
The gem5 Simulator: Version 20.0+. CoRR abs/2007.03152 (2020)
2010 – 2019
- 2019
- [c199]Timo Lehnigk-Emden, Matthias Alles, Claus Kestel, Norbert Wehn:
Polar Code Decoder Framework. DATE 2019: 1208-1209 - [c198]Matthias Jung, Frank Schnicke, Markus Damm, Thomas Kuhn, Norbert Wehn:
Speculative Temporal Decoupling Using fork(). DATE 2019: 1721-1726 - [c197]Jasmin Jahic, Varun Kumar, Matthias Jung, Gerhard Wirrer, Norbert Wehn, Thomas Kuhn:
Rapid Identification of Shared Memory in Multithreaded Embedded Systems with Static Scheduling. ICPP Workshops 2019: 15:1-15:8 - [c196]Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn:
An In-DRAM Neural Network Processing Engine. ISCAS 2019: 1-5 - [c195]Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn:
Fast validation of DRAM protocols with timed petri nets. MEMSYS 2019: 133-147 - [c194]Carl Christian Rheinländer, Norbert Wehn:
Adaptive Transient Computing for Power-Neutral Embedded Devices. PATMOS 2019: 63-68 - [c193]Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Norbert Wehn, Andreas Dengel:
iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Text Line Extraction. ReConFig 2019: 1-8 - [c192]Sven Müelich, Sebastian Bitzer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Martin Bossert, Robert F. H. Fischer:
Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements. REDUNDANCY 2019: 149-154 - [c191]Deepak M. Mathew, André Lucas Chinazzo, Christian Weis, Matthias Jung, Bastien Giraud, Pascal Vivet, Alexandre Levisse, Norbert Wehn:
RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM. SAMOS 2019: 34-47 - [c190]Chirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung, Norbert Wehn:
A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. SAMOS 2019: 429-441 - [c189]Norbert Wehn:
Wednesday Keynote: The Memory Wall: Challenges and Solutions. SoCC 2019: 1-2 - [i10]Florian Gensheimer, Tobias Dietz, Kira Kraft, Stefan Ruzika, Norbert Wehn:
A Reduced-Complexity Projection Algorithm for ADMM-based LP Decoding. CoRR abs/1901.03240 (2019) - [i9]Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn:
eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. CoRR abs/1911.00889 (2019) - 2018
- [j35]Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian de Schryver, Christian Weis, Norbert Wehn, Katharina Anna Zweig:
A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs. IEEE Des. Test 35(1): 7-15 (2018) - [j34]Stefan Weithoffer, Norbert Wehn:
Low-Latency CRC Calculation in Turbo-Code Decoding. Int. J. Wirel. Inf. Networks 25(1): 98-107 (2018) - [c188]Deepak M. Mathew, Martin Schultheis, Carl Christian Rheinländer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Matthias Jung:
An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. DATE 2018: 293-296 - [c187]A. Cristiano I. Malossi, Michael Schaffner, Anca Molnos, Luca Gammaitoni, Giuseppe Tagliavini, Andrew P. J. Emerson, Andrés Tomás, Dimitrios S. Nikolopoulos, Eric Flamand, Norbert Wehn:
The transprecision computing paradigm: Concept, design, and applications. DATE 2018: 1105-1110 - [c186]Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung:
Improving the error behavior of DRAM by exploiting its Z-channel property. DATE 2018: 1492-1495 - [c185]Vladimir Rybalkin, Syed Saqib Bukhari, Muhammad Mohsin Ghaffar, Aqib Ghafoor, Norbert Wehn, Andreas Dengel:
iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing: Percentile Based Binarization. DocEng 2018: 24:1-24:8 - [c184]Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott:
FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. FPL 2018: 89-96 - [c183]Florian Gensheimer, Tobias Dietz, Stefan Ruzika, Kira Kraft, Norbert Wehn:
Improved Maximum-Likelihood Decoding Using Sparse Parity-Check Matrices. ICT 2018: 236-240 - [c182]Menbere Kina Tekleyohannes, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist:
A Reconfigurable Accelerator for Morphological Operations. IPDPS Workshops 2018: 186-193 - [c181]Christian Weis, Matthias Jung, Éder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn:
The Role of Memories in Transprecision Computing. ISCAS 2018: 1-5 - [c180]Florian Gensheimer, Tobias Dietz, Stefan Ruzika, Kira Kraft, Norbert Wehn:
A Low-Complexity Projection Algorithm for ADMM-Based LP Decoding. ISTC 2018: 1-5 - [c179]Claus Kestel, Matthias Herrmann, Norbert Wehn:
When Channel Coding Hits the Implementation Wall. ISTC 2018: 1-6 - [c178]Stefan Weithoffer, Charbel Abdel Nour, Norbert Wehn, Catherine Douillard, Claude Berrou:
25 Years of Turbo Codes: From Mb/s to beyond 100 Gb/s. ISTC 2018: 1-6 - [c177]Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn, Florian Longnos:
Efficient coding scheme for DDR4 memory subsystems. MEMSYS 2018: 148-157 - [c176]Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn:
Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving. MEMSYS 2018: 377-386 - [c175]Dominik Marek Loroch, Franz-Josef Pfreundt, Norbert Wehn, Janis Keuper:
Sparsity in Deep Neural Networks - An Empirical Investigation with TensorQuant. DMLE/IOTSTREAMING@PKDD/ECML 2018: 5-20 - [c174]Jasmin Jahic, Matthias Jung, Thomas Kuhn, Claus Kestel, Norbert Wehn:
A Framework for Non-intrusive Trace-driven Simulation of Manycore Architectures with Dynamic Tracing Configuration. RV 2018: 458-468 - [c173]Jasmin Jahic, Thomas Kuhn, Matthias Jung, Norbert Wehn:
BOSMI: a framework for non-intrusive monitoring and testing of embedded multithreaded software on the logical level. SAMOS 2018: 131-138 - [i8]Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn:
Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact. CoRR abs/1803.07613 (2018) - [i7]Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott:
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs. CoRR abs/1807.04093 (2018) - [i6]Dominik Marek Loroch, Franz-Josef Pfreundt, Norbert Wehn, Janis Keuper:
Sparsity in Deep Neural Networks - An Empirical Investigation with TensorQuant. CoRR abs/1808.08784 (2018) - 2017
- [j33]Matthias Jung, Deepak M. Mathew, Carl Christian Rheinländer, Christian Weis, Norbert Wehn:
A Platform to Analyze DDR3 DRAM's Power and Retention Time. IEEE Des. Test 34(4): 52-59 (2017) - [j32]Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn:
3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems. Int. J. Parallel Program. 45(6): 1420-1460 (2017) - [j31]Christian Weis, Abdul Mutaal, Omar Naji, Matthias Jung, Andreas Hansson, Norbert Wehn:
DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool. Int. J. Parallel Program. 45(6): 1566-1591 (2017) - [j30]Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn:
A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture. J. Signal Process. Syst. 87(3): 327-341 (2017) - [c172]Stefan Weithoffer, Kira Kraft, Norbert Wehn:
Bit-level pipelining for highly parallel turbo-code decoders: A critical assessment. AFRICON 2017: 121-126 - [c171]Marcus Schmidt, Sebastian Wille, Carl Rheinländer, Norbert Wehn, Thomas Jaitner:
A Wearable Flexible Sensor Network Platform for the Analysis of Different Sport Movements. AHFE (24) 2017: 3-14 - [c170]Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis:
A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC 2017: 47:1-47:6 - [c169]Menbere Tekleyohannes, MohammadSadegh Sadri, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist:
An advanced embedded architecture for connected component analysis in industrial applications. DATE 2017: 734-735 - [c168]Vladimir Rybalkin, Norbert Wehn, Mohammad Reza Yousefi, Didier Stricker:
Hardware architecture of Bidirectional Long Short-Term Memory Neural Network for Optical Character Recognition. DATE 2017: 1390-1395 - [c167]Stefan Weithoffer, Norbert Wehn:
Enhanced decoding for high-rate LTE Turbo-Codes with short block lengths. ICC Workshops 2017: 967-972 - [c166]Javier Alejandro Varela, Norbert Wehn, Qian Liang, Songyin Tang:
Exploiting Decoupled OpenCL Work-Items with Data Dependencies on FPGAs: A Case Study. IPDPS Workshops 2017: 124-131 - [c165]Javier Alejandro Varela, Norbert Wehn:
Near Real-Time Risk Simulation of Complex Portfolios on Heterogeneous Computing Systems with OpenCL. IWOCL 2017: 2:1-2:10 - [c164]Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn:
Integrating DRAM power-down modes in gem5 and quantifying their impact. MEMSYS 2017: 86-95 - [c163]Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce L. Jacob, Norbert Wehn:
Using run-time reverse-engineering to optimize DRAM refresh. MEMSYS 2017: 115-124 - [c162]Deepak M. Mathew, Éder F. Zulian, Subash Kannoth, Matthias Jung, Christian Weis, Norbert Wehn:
A Bank-Wise DRAM Power Model for System Simulations. RAPIDO 2017: 5 - [c161]Christian Menard, Jerónimo Castrillón, Matthias Jung, Norbert Wehn:
System simulation with gem5 and SystemC: The keystone for full interoperability. SAMOS 2017: 62-69 - [c160]Matthias Jung, Kira Kraft, Norbert Wehn:
A new state model for DRAMs using Petri Nets. SAMOS 2017: 221-226 - [c159]Jasmin Jahic, Thomas Kuhn, Matthias Jung, Norbert Wehn:
Supervised testing of concurrent software in embedded systems. SAMOS 2017: 233-238 - [c158]Dominik Marek Loroch, Franz-Josef Pfreundt, Norbert Wehn, Janis Keuper:
TensorQuant: A Simulation Toolbox for Deep Neural Network Quantization. MLHPC@SC 2017: 1:1-1:8 - [c157]Javier Alejandro Varela, Norbert Wehn, Sascha Desmettre, Ralf Korn:
Real-Time Financial Risk Measurement of Dynamic Complex Portfolios with Python and PyOpenCL. PyHPC@SC 2017: 3:1-3:10 - [c156]Stefan Weithoffer, Matthias Herrmann, Claus Kestel, Norbert Wehn:
Advanced wireless digital baseband signal processing beyond 100 Gbit/s. SiPS 2017: 1-6 - [c155]Norbert Wehn:
The memory challenge in computing systems: A survey. SoCC 2017: 1-2 - [c154]Norbert Wehn:
The memory challenge in computing systems: A survey. SoCC 2017: 1 - [i5]Dominik Marek Loroch, Norbert Wehn, Franz-Josef Pfreundt, Janis Keuper:
TensorQuant - A Simulation Toolbox for Deep Neural Network Quantization. CoRR abs/1710.05758 (2017) - 2016
- [j29]Christian Brugger, Gongda Liu, Christian de Schryver, Norbert Wehn:
Precision-tuning and hybrid pricer for closed-form solution-based Heston calibration. Concurr. Comput. Pract. Exp. 28(3): 892-904 (2016) - [j28]Matthias Jung, Christian Weis, Norbert Wehn:
A cross layer approach for efficient thermal management in 3D stacked SoCs. Microelectron. Reliab. 61: 43-47 (2016) - [j27]Christian Brugger, André Lucas Chinazzo, Alexandre Flores John, Christian de Schryver, Norbert Wehn, Wolfgang Eugen Schlauch, Katharina Anna Zweig:
Increasing sampling efficiency for the fixed degree sequence model with phase transitions. Soc. Netw. Anal. Min. 6(1): 100:1-100:14 (2016) - [c153]Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn:
Efficient reliability management in SoCs - an approximate DRAM perspective. ASP-DAC 2016: 390-394 - [c152]Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn:
Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAM. DAC 2016: 100:1-100:4 - [c151]Philipp Schläfer, Chu-Hsiang Huang, Clayton Schoeny, Christian Weis, Yao Li, Norbert Wehn, Lara Dolecek:
Error resilience and energy efficiency: An LDPC decoder design study. DATE 2016: 588-593 - [c150]Stefan Scholl, Philipp Schläfer, Norbert Wehn:
Saturated min-sum decoding: An "afterburner" for LDPC decoder hardware. DATE 2016: 1219-1224 - [c149]Marcus Schmidt, Carl Christian Rheinländer, Sebastian Wille, Norbert Wehn, Thomas Jaitner:
IMU-based determination of fatigue during long sprint. UbiComp Adjunct 2016: 899-903 - [c148]Carl Christian Rheinländer, Norbert Wehn:
Precise synchronization time stamp generation for Bluetooth low energy. IEEE SENSORS 2016: 1-3 - [c147]Stefan Weithoffer, Frederic Pohl, Norbert Wehn:
On the applicability of trellis compression to Turbo-Code decoder hardware architectures. ISTC 2016: 61-65 - [c146]Florian Gensheimer, Stefan Ruzika, Stefan Scholl, Norbert Wehn:
ADMM versus simplex algorithm for LP decoding. ISTC 2016: 211-215 - [c145]Stefan Scholl, Stefan Weithoffer, Norbert Wehn:
Advanced iterative channel coding schemes: When Shannon meets Moore. ISTC 2016: 406-411 - [c144]Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn, Irene Heinrich, Marco V. Natale, Sven O. Krumke:
ConGen: An Application Specific DRAM Memory Controller Generator. MEMSYS 2016: 257-267 - [c143]Matthias Jung, Carl Christian Rheinländer, Christian Weis, Norbert Wehn:
Reverse Engineering of DRAMs: Row Hammer with Crosshair. MEMSYS 2016: 471-476 - [c142]Matthias Jung, Deepak M. Mathew, Éder F. Zulian, Christian Weis, Norbert Wehn:
A new bank sensitive DRAMPower model for efficient design space exploration. PATMOS 2016: 283-288 - [c141]Radhika Jagtap, Stephan Diestelhorst, Andreas Hansson, Matthias Jung, Norbert Wehn:
Exploring system performance using elastic traces: Fast, accurate and portable. SAMOS 2016: 96-105 - [c140]Vladimir Rybalkin, Philipp Schläfer, Norbert Wehn:
A New Architecture for High Speed, Low Latency NB-LDPC Check Node Processing for GF(256). VTC Spring 2016: 1-5 - 2015
- [j26]Matthias Jung, Christian Weis, Norbert Wehn:
DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework. IPSJ Trans. Syst. LSI Des. Methodol. 8: 63-74 (2015) - [j25]Michael Glaß, Hananeh Aliee, Liang Chen, Mojtaba Ebrahimi, Faramarz Khosravi, Veit B. Kleeberger, Alexandra Listl, Daniel Müller-Gritschneder, Fabian Oboril, Ulf Schlichtmann, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis:
Application-aware cross-layer reliability analysis and optimization. it Inf. Technol. 57(3): 159-169 (2015) - [c139]Christian Brugger, André Lucas Chinazzo, Alexandre Flores John, Christian de Schryver, Norbert Wehn, Andreas Spitz, Katharina Anna Zweig:
Exploiting Phase Transitions for the Efficient Sampling of the Fixed Degree Sequence Model. ASONAM 2015: 308-313 - [c138]Christian Weis, Matthias Jung, Peter Ehses, Cristiano Santos, Pascal Vivet, Sven Goossens, Martijn Koedam, Norbert Wehn:
Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. DATE 2015: 495-500 - [c137]Christian Brugger, Javier Alejandro Varela, Norbert Wehn, Songyin Tang, Ralf Korn:
Reverse longstaff-schwartz american option pricing on hybrid CPU/FPGA systems. DATE 2015: 1599-1602 - [c136]Philipp Schläfer, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden, Emmanuel Boutillon:
Syndrome based check node processing of high order NB-LDPC decoders. ICT 2015: 156-162 - [c135]Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian Weis, Christian de Schryver, Katharina Anna Zweig, Norbert Wehn:
A Custom Computing System for Finding Similarties in Complex Networks. ISVLSI 2015: 262-267 - [c134]Christian Weis, Matthias Jung, Omar Naji, Norbert Wehn, Cristiano Santos, Pascal Vivet, Andreas Hansson:
Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs. ISVLSI 2015: 609-614 - [c133]Matthias Jung, Éder Zulian, Deepak M. Mathew, Matthias Herrmann, Christian Brugger, Christian Weis, Norbert Wehn:
Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs. MEMSYS 2015: 85-91 - [c132]Philipp Schläfer, Vladimir Rybalkin, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden, Emmanuel Boutillon:
A new architecture for high throughput, low latency NB-LDPC check node processing. PIMRC 2015: 1392-1397 - [c131]Stefan Weithoffer, Norbert Wehn:
Latency reduction for LTE/LTE-A turbo-code decoders by on-the-fly calculation of CRC. PIMRC 2015: 1409-1414 - [c130]Javier Alejandro Varela, Christian Brugger, Christian de Schryver, Norbert Wehn, Songyin Tang, Steffen Omland:
Exploiting the brownian bridge technique to improve longstaff-schwartz american option pricing on FPGA systems. ReConFig 2015: 1-6 - [c129]Omar Naji, Christian Weis, Matthias Jung, Norbert Wehn, Andreas Hansson:
A high-level DRAM timing, power and area exploration tool. SAMOS 2015: 149-156 - [c128]Javier Alejandro Varela, Claus Kestel, Christian de Schryver, Norbert Wehn, Sascha Desmettre, Ralf Korn:
Optimization strategies for portable code for Monte Carlo-based value-at-risk systems. WHPCF@SC 2015: 3:1-3:8 - 2014
- [j24]Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich:
Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. 54(6-7): 1066-1074 (2014) - [j23]Christina Gimmler-Dumont, Norbert Wehn:
A Cross-Layer Reliability Design Methodology for Efficient, Dependable Wireless Receivers. ACM Trans. Embed. Comput. Syst. 13(4s): 137:1-137:29 (2014) - [c127]Christian Brugger, Christian de Schryver, Norbert Wehn, Steffen Omland, Mario Hefter, Klaus Ritter, Anton Kostiuk, Ralf Korn:
Mixed precision multilevel Monte Carlo on hybrid computing systems. CIFEr 2014: 215-222 - [c126]Imran Ali, Uwe Wasenmüller, Norbert Wehn:
Feedforward carrier synchronization for pilotless bursts of DVB-RCS2. CSNDSP 2014: 342-347 - [c125]Karthik Chandrasekar, Sven Goossens, Christian Weis, Martijn Koedam, Benny Akesson, Norbert Wehn, Kees Goossens:
Exploiting expendable process-margins in DRAMs for run-time performance optimization. DATE 2014: 1-6 - [c124]Rainer Leupers, Norbert Wehn, Marco Roodzant, Johannes Stahl, Luca Fanucci, Albert Cohen, Bernd Janson:
Technology transfer towards Horizon 2020. DATE 2014: 1 - [c123]MohammadSadegh Sadri, Matthias Jung, Christian Weis, Norbert Wehn, Luca Benini:
Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh. DATE 2014: 1-4 - [c122]Ulf Schlichtmann, Veit Kleeberger, Jacob A. Abraham, Adrian Evans, Christina Gimmler-Dumont, Michael Glaß, Andreas Herkersdorf, Sani R. Nassif, Norbert Wehn:
Connecting different worlds - Technology abstraction for reliability-aware design and Test. DATE 2014: 1-8 - [c121]Stefan Scholl, Norbert Wehn:
Hardware implementation of a Reed-Solomon soft decoder based on information set decoding. DATE 2014: 1-6 - [c120]Victor Tomashevich, Christina Gimmler-Dumont, Christian Fesl, Norbert Wehn, Ilia Polian:
A new architecture for minimum mean square error sorted QR decomposition for MIMO wireless communication systems. DDECS 2014: 246-249 - [c119]Christian Brugger, Christian de Schryver, Norbert Wehn:
HyPER: A runtime reconfigurable architecture for monte carlo option pricing in the Heston model. FPL 2014: 1-8 - [c118]Peter Hevesi, Sebastian Wille, Gerald Pirkl, Norbert Wehn, Paul Lukowicz:
Monitoring household activities and user location with a cheap, unobtrusive thermal sensor array. UbiComp 2014: 141-145 - [c117]Marcus Schmidt, Thomas Jaitner, Kevin Nolte, Carl Rheinländer, Sebastian Wille, Norbert Wehn:
A Wearable Inertial Sensor Unit for Jump Diagnosis in Multiple Athletes. icSPORTS 2014: 216-220 - [c116]Stefan Scholl, Norbert Wehn:
Advanced hardware architecture for soft decoding Reed-Solomon codes. ISTC 2014: 22-26 - [c115]Florian Gensheimer, Stefan Ruzika, Stefan Scholl, Norbert Wehn:
A simplex algorithm for LP decoding hardware. PIMRC 2014: 790-794 - [c114]Christian Brugger, Gongda Liu, Christian de Schryver, Norbert Wehn:
A systematic methodology for analyzing closed-form Heston pricer regarding their accuracy and runtime. WHPCF@SC 2014: 9-16 - [c113]Matthias Jung, Christian Weis, Norbert Wehn, MohammadSadegh Sadri, Luca Benini:
Optimized active and power-down mode refresh control in 3D-DRAMs. VLSI-SoC 2014: 1-6 - [c112]Victor Tomashevich, Christina Gimmler-Dumont, Norbert Wehn, Ilia Polian:
Reliability analysis of MIMO channel preprocessing by fault injection. WiSEE 2014: 1-6 - 2013
- [j22]Christina Gimmler-Dumont, Matthias May, Norbert Wehn:
Cross-Layer Error Resilience and Its Application to Wireless Communication Systems. J. Low Power Electron. 9(1): 119-132 (2013) - [j21]Veit Kleeberger, Christina Gimmler-Dumont, Christian Weis, Andreas Herkersdorf, Daniel Mueller-Gritschneder, Sani R. Nassif, Ulf Schlichtmann, Norbert Wehn:
A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. IEEE Micro 33(4): 46-55 (2013) - [j20]Michael Arndt, Sebastian Wille, Luiza de Souza, Vítor Fortes Rey, Norbert Wehn, Karsten Berns:
Performance evaluation of ambient services by combining robotic frameworks and a smart environment platform. Robotics Auton. Syst. 61(11): 1173-1185 (2013) - [j19]Christian Weis, Igor Loi, Luca Benini, Norbert Wehn:
Exploration and Optimization of 3-D Integrated DRAM Subsystems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(4): 597-610 (2013) - [c111]Stefan Scholl, Christopher Stumm, Norbert Wehn:
Hardware implementations of Gaussian elimination over GF(2) for channel decoding algorithms. AFRICON 2013: 1-5 - [c110]Imran Ali, Uwe Wasenmüller, Norbert Wehn:
Code-aided synchronization with QPSK, 8-PSK and 16-QAM modulations. APCC 2013: 561-566 - [c109]Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens:
Towards variation-aware system-level power estimation of DRAMs: an empirical approach. DAC 2013: 23:1-23:8 - [c108]Jörg Henkel, Lars Bauer, Nikil D. Dutt, Puneet Gupta, Sani R. Nassif, Muhammad Shafique, Mehdi Baradaran Tahoori, Norbert Wehn:
Reliable on-chip systems in the nano-era: lessons learnt and future trends. DAC 2013: 99:1-99:10 - [c107]Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens:
System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs. DATE 2013: 236-241 - [c106]Christian de Schryver, Pedro Torruella, Norbert Wehn:
A multi-level Monte Carlo FPGA accelerator for option pricing in the Heston model. DATE 2013: 248-253 - [c105]MohammadSadegh Sadri, Christian Weis, Norbert Wehn, Luca Benini:
Energy and performance exploration of accelerator coherency port using Xilinx ZYNQ. FPGAworld 2013: 5:1-5:8 - [c104]Jingyuan Cheng, Bo Zhou, Kai Kunze, Carl Christian Rheinländer, Sebastian Wille, Norbert Wehn, Jens Weppner, Paul Lukowicz:
Activity recognition and nutrition monitoring in every day situations with a textile capacitive neckband. UbiComp (Adjunct Publication) 2013: 155-158 - [c103]Christina Gimmler-Dumont, Philipp Schläfer, Norbert Wehn:
ASIC implementation of a modified QR decomposition for tree search based MIMO detection. LASCAS 2013: 1-4 - [c102]Matthias Jung, Christian Weis, Norbert Wehn, Karthik Chandrasekar:
TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration. RAPIDO 2013: 5:1-5:6 - [c101]Christian de Schryver, Philipp Schläfer, Norbert Wehn, Thomas Fischer, Arnd Poetzsch-Heffter:
Loopy - An open-source TCP/IP rapid prototyping and validation framework. ReConFig 2013: 1-6 - [c100]Philipp Schläfer, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden:
A new dimension of parallelism in ultra high throughput LDPC decoding. SiPS 2013: 153-158 - 2012
- [j18]Christian de Schryver, Daniel Schmidt, Norbert Wehn, Elke Korn, Henning Marxen, Anton Kostiuk, Ralf Korn:
A Hardware Efficient Random Number Generator for Nonuniform Distributions with Arbitrary Precision. Int. J. Reconfigurable Comput. 2012: 675130:1-675130:11 (2012) - [j17]Philipp Schläfer, Christian Weis, Norbert Wehn, Matthias Alles:
Design Space of Flexible Multigigabit LDPC Decoders. VLSI Design 2012: 942893:1-942893:10 (2012) - [c99]Christian Brehm, Matthias May, Christina Gimmler, Norbert Wehn:
A Case Study on Error Resilient Architectures for Wireless Communication. ARCS 2012: 13-24 - [c98]Manil Dev Gomony, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens:
DRAM selection and configuration for real-time mobile systems. DATE 2012: 51-56 - [c97]Christian Weis, Igor Loi, Luca Benini, Norbert Wehn:
An energy efficient DRAM subsystem for 3D integrated SoCs. DATE 2012: 1138-1141 - [c96]Ivan Shcherbakov, Norbert Wehn:
A Parallel Adaptive Range Coding Compressor: Algorithm, FPGA Prototype, Evaluation. DCC 2012: 119-128 - [c95]Jörg Henkel, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel, Norbert Wehn:
Dependable embedded systems: The German research foundation DFG priority program SPP 1500. ETS 2012: 1 - [c94]Michael Arndt, Karsten Berns, Sebastian Wille, Norbert Wehn, Luiza de Souza:
Combining robotic frameworks with a smart environment framework: MCA2/SimVis3D and TinySEP. UbiComp 2012: 818-825 - [c93]Christina Gimmler, Frank Kienle, Christian Weis, Norbert Wehn, Matthias Alles:
ASIC design of a Gbit/s LDPC decoder for iterative MIMO systems. ICNC 2012: 192-197 - [c92]Ivan Shcherbakov, Christian Weis, Norbert Wehn:
A High-Performance FPGA-Based Implementation of the LZSS Compression Algorithm. IPDPS Workshops 2012: 449-453 - [c91]Thomas Ilnseher, Frank Kienle, Christian Weis, Norbert Wehn:
A 2.15GBit/s turbo code decoder for LTE advanced base station applications. ISTC 2012: 21-25 - [c90]Christina Gimmler-Dumont, Philipp Schläfer, Norbert Wehn:
FPGA-based rapid prototyping platform for MIMO-BICM design space exploration. ReConFig 2012: 1-7 - [c89]Christina Gimmler-Dumont, Christian Brehm, Norbert Wehn:
Reliability study on system memories of an iterative MIMO-BICM system. VLSI-SoC 2012: 255-258 - 2011
- [j16]Frank Kienle, Norbert Wehn, Heinrich Meyr:
On Complexity, Energy- and Implementation-Efficiency of Channel Decoders. IEEE Trans. Commun. 59(12): 3301-3310 (2011) - [c88]Norbert Wehn:
Reliability: A Cross-Disciplinary and Cross-Layer Approach. Asian Test Symposium 2011: 496-497 - [c87]Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich:
Design and architectures for dependable embedded systems. CODES+ISSS 2011: 69-78 - [c86]Christian Weis, Norbert Wehn, Igor Loi, Luca Benini:
Design space exploration for 3D-stacked DRAMs. DATE 2011: 389-394 - [c85]Ivan Shcherbakov, Christian Weis, Norbert Wehn:
Bringing C++ productivity to VHDL world: From language definition to a case study. FDL 2011: 1-7 - [c84]Christian Brehm, Thomas Ilnseher, Norbert Wehn:
A scalable multi-ASIP architecture for standard compliant trellis decoding. ISOCC 2011: 349-352 - [c83]Christian de Schryver, Matthias Jung, Norbert Wehn, Henning Marxen, Anton Kostiuk, Ralf Korn:
Energy Efficient Acceleration and Evaluation of Financial Computations towards Real-Time Pricing. KES (4) 2011: 177-186 - [c82]Christian de Schryver, Ivan Shcherbakov, Frank Kienle, Norbert Wehn, Henning Marxen, Anton Kostiuk, Ralf Korn:
An Energy Efficient FPGA Accelerator for Monte Carlo Option Pricing with the Heston Model. ReConFig 2011: 468-474 - [c81]Christian Brehm, Norbert Wehn, Sacha Loitz, Wolfgang Kunz:
Validation of channel decoding ASIPs a case study. International Symposium on Rapid System Prototyping 2011: 74-78 - [c80]Henning Marxen, Anton Kostiuk, Ralf Korn, Christian de Schryver, Stephan Wurm, Ivan Shcherbakov, Norbert Wehn:
Algorithmic complexity in the heston model: an implementation view. WHPCF@SC 2011: 5-12 - [c79]Thomas Ilnseher, Matthias May, Norbert Wehn:
A monolithic LTE interleaver generator for highly parallel SMAP decoders. WTS 2011: 1-4 - 2010
- [j15]Akin Tanatmis, Stefan Ruzika, Horst W. Hamacher, Mayur Punekar, Frank Kienle, Norbert Wehn:
A separation algorithm for improved LP-decoding of linear block codes. IEEE Trans. Inf. Theory 56(7): 3277-3289 (2010) - [c78]Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich:
A rapid prototyping system for error-resilient multi-processor systems-on-chip. DATE 2010: 375-380 - [c77]Matthias May, Thomas Ilnseher, Norbert Wehn, Wolfgang Raab:
A 150Mbit/s 3GPP LTE Turbo code decoder. DATE 2010: 1420-1425 - [c76]Muhammad Anis, Maurits Ortmanns, Norbert Wehn:
RF spectrum sensing technique for cognitive UWB radio network. ESSCIRC 2010: 506-509 - [c75]Sacha Loitz, Markus Wedler, Dominik Stoffel, Christian Brehm, Norbert Wehn, Wolfgang Kunz:
Complete Verification of Weakly Programmable IPs against Their Operational ISA Model. FDL 2010: 29-36 - [c74]Muhammad Anis, Maurits Ortmanns, Norbert Wehn:
Fully integrated UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices. ISCAS 2010: 1213-1215 - [c73]Fabien Clermidy, Christian Bernard, Romain Lemaire, Jérôme Martin, Ivan Miro Panades, Yvain Thonnart, Pascal Vivet, Norbert Wehn:
A 477mW NoC-based digital baseband for MIMO 4G SDR. ISSCC 2010: 278-279 - [c72]Sebastian Wille, Norbert Wehn, Ivan Martinovic, Simon Kunz, Peter Göhner:
AmICA - A Flexible, Compact, Easy-to-Program and Low-Power WSN Platform. MobiQuitous 2010: 381-382 - [c71]Christina Gimmler, Timo Lehnigk-Emden, Norbert Wehn:
Low-complexity iteration control for MIMO-BICM systems. PIMRC 2010: 241-246 - [c70]Christian de Schryver, Daniel Schmidt, Norbert Wehn, Elke Korn, Henning Marxen, Ralf Korn:
A New Hardware Efficient Inversion Based Random Number Generator for Non-uniform Distributions. ReConFig 2010: 190-195 - [c69]Gabriel Luca Nazar, Christina Gimmler, Norbert Wehn:
Implementation comparisons of the QR decomposition for MIMO detection. SBCCI 2010: 210-214 - [p1]Matthias Alles, Timo Vogt, Christian Brehm, Norbert Wehn:
FlexiChaP: A Dynamically Reconfigurable ASIP for Channel Decoding for Future Mobile Systems. Dynamically Reconfigurable Systems 2010: 293-314 - [e2]Marco Platzner, Jürgen Teich, Norbert Wehn:
Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications. Springer 2010, ISBN 978-9-04-813484-7 [contents] - [i4]Frank Kienle, Norbert Wehn, Heinrich Meyr:
On Complexity, Energy- and Implementation-Efficiency of Channel Decoders. CoRR abs/1003.3792 (2010)
2000 – 2009
- 2009
- [j14]Zoltán Herczeg, Daniel Schmidt, Ákos Kiss, Norbert Wehn, Tibor Gyimóthy:
Energy simulation of embedded XScale systems with XEEMU. J. Embed. Comput. 3(3): 209-219 (2009) - [c68]Daniel Schmidt, Matthias Berning, Norbert Wehn:
Error correction in single-hop wireless sensor networks - A case study. DATE 2009: 1296-1301 - [c67]Stefan Müller, Manuel Schreger, Marten Kabutz, Matthias Alles, Frank Kienle, Norbert Wehn:
A novel LDPC decoder for DVB-S2 IP. DATE 2009: 1308-1313 - [c66]Stefan Ruzika, Akin Tanatmis, Frank Kienle, Horst W. Hamacher, Norbert Wehn, Mayur Punekar:
Valid inequalities for binary linear codes. ISIT 2009: 2216-2220 - [c65]Daniel Schmidt, Norbert Wehn:
DRAM power management and energy consumption: a critical assessment. SBCCI 2009 - 2008
- [j13]Christian Neeb, Norbert Wehn:
Designing efficient irregular networks for heterogeneous systems-on-chip. J. Syst. Archit. 54(3-4): 384-396 (2008) - [j12]Timo Vogt, Norbert Wehn:
A Reconfigurable ASIP for Convolutional and Turbo Decoding in an SDR Environment. IEEE Trans. Very Large Scale Integr. Syst. 16(10): 1309-1320 (2008) - [c64]Peter Jung, Alexander Vießmann, Christoph Spiegel, Admir Burnic, Zijian Bai, Guido Horst Bruck, Konstantin Statnikov, Andreas Waadt, Shangbo Wang, Xavier Popon, Rafael Rodriguez Velilla, Harri Saarnisaari, Matthias Alles, Torben Brack, Frank Kienle, Friedbert Berens, Salvatore Rotolo, Fabio Mario Scalise, Norbert Wehn:
Cognitive Radio Prototyping. CrownCom 2008: 1-6 - [c63]Timo Vogt, Norbert Wehn:
A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment. DATE 2008: 38-43 - [c62]Matthias May, Matthias Alles, Norbert Wehn:
A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder. DATE 2008: 456-461 - [c61]Muhammad Anis, Reinhard Tielert, Norbert Wehn:
Super-regenerative UWB impulse detector with synchronized quenching mechanism. ESSCIRC 2008: 390-393 - [c60]Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Götz Kappen, Tobias G. Noll:
Application-specific reconfigurable processors. FPL 2008: 350 - [c59]Muhammad Anis, Reinhard Tielert, Norbert Wehn:
3.1-to-7GHz UWB impulse radio transceiver front-end based on statistical correlation technique. ISCAS 2008: 664-667 - [c58]Muhammad Anis, Reinhard Tielert, Norbert Wehn:
Fully integrated self-quenched super-regenerative UWB impulse detector. ISWPC 2008: 773-775 - [c57]Sacha Loitz, Markus Wedler, Christian Brehm, Timo Vogt, Norbert Wehn, Wolfgang Kunz:
Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking. SASP 2008: 48-54 - [c56]Frank Kienle, Norbert Wehn:
Macro Interleaver Design for Bit Interleaved Coded Modulation with Low-Density Parity-Check Codes. VTC Spring 2008: 763-766 - [i3]Akin Tanatmis, Stefan Ruzika, Horst W. Hamacher, Mayur Punekar, Frank Kienle, Norbert Wehn:
A Separation Algorithm for Improved LP-Decoding of Linear Block Codes. CoRR abs/0812.2559 (2008) - 2007
- [c55]Torben Brack, Matthias Alles, Timo Lehnigk-Emden, Frank Kienle, Norbert Wehn, Nicola E. L'Insalata, Francesco Rossi, Massimo Rovini, Luca Fanucci:
Low complexity LDPC code decoders for next generation standards. DATE 2007: 331-336 - [c54]Matthias May, Christian Neeb, Norbert Wehn:
Evaluation of High Throughput Turbo-Decoder Architectures. ISCAS 2007: 2770-2773 - [c53]Zoltán Herczeg, Ákos Kiss, Daniel Schmidt, Norbert Wehn, Tibor Gyimóthy:
XEEMU: An Improved XScale Power Simulator. PATMOS 2007: 300-309 - [c52]Matthias Alles, Timo Lehnigk-Emden, Uwe Wasenmüller, Norbert Wehn:
Implementation Issues of Turbo Synchronization with Duo-Binary Turbo Decoding. PIMRC 2007: 1-5 - [c51]Matthias Alles, Torben Brack, Norbert Wehn:
A Reliability-Aware LDPC Code Decoding Algorithm. VTC Spring 2007: 1544-1548 - [c50]Torben Brack, Matthias Alles, Timo Lehnigk-Emden, Frank Kienle, Norbert Wehn, Friedbert Berens, Andreas Ruegg:
A Survey on LDPC Codes and Decoders for OFDM-based UWB Systems. VTC Spring 2007: 1549-1553 - 2006
- [c49]Torben Brack, Frank Kienle, Norbert Wehn:
Disclosing the LDPC code decoder design space. DATE 2006: 200-205 - [c48]Christian Neeb, Norbert Wehn:
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip. DSD 2006: 665-672 - [c47]Norbert Wehn:
Advanced Channel Decoding Algorithms and Their Implementation for Future Communication Systems. ISVLSI 2006: 3 - [c46]Torben Brack, Matthias Alles, Frank Kienle, Norbert Wehn:
A Synthesizable IP Core for WIMAX 802.16E LDPC Code Decoding. PIMRC 2006: 1-5 - [c45]Timo Vogt, Christian Neeb, Norbert Wehn:
A Reconfigurable Multi-Processor Platform for Convolutional and Turbo Decoding. ReCoSoC 2006: 16-23 - [c44]Timo Vogt, Norbert Wehn:
A Reconfigurable Applcation Specific Instruction Set Processor for Viterbi and Log-MAP Decoding. SiPS 2006: 142-147 - [c43]Frank Kienle, Timo Lehnigk-Emden, Norbert Wehn:
Fast convergence algorithm for LDPC Codes. VTC Spring 2006: 2393-2397 - [i2]Norbert Wehn, Timo Vogt, Christian Neeb:
A Reconfigurable Outer Modem Platform for Future Communications Systems. Dynamically Reconfigurable Architectures 2006 - 2005
- [j11]Frank Gilbert, Timo Vogt, Norbert Wehn:
Architecture-driven voltage scaling for high-throughput turbo-decoders. J. Embed. Comput. 1(3): 391-402 (2005) - [j10]Michael J. Thul, Frank Gilbert, Timo Vogt, Gerd Kreiselmaier, Norbert Wehn:
A Scalable System Architecture for High-Throughput Turbo-Decoders. J. VLSI Signal Process. 39(1-2): 63-77 (2005) - [c42]Frank Kienle, Torben Brack, Norbert Wehn:
A Synthesizable IP Core for DVB-S2 LDPC Code Decoding. DATE 2005: 100-105 - [c41]Christian Neeb, Norbert Wehn:
Energieminimierung von Basisbandsignalverarbeitungsalgorithmen auf programmierbaren Plattformen. GI Jahrestagung (1) 2005: 442 - [c40]Christian Neeb, Michael J. Thul, Norbert Wehn:
Network-on-chip-centric approach to interleaving in high throughput channel decoders. ISCAS (2) 2005: 1766-1769 - [i1]Norbert Wehn:
Power Optimization in advanced Channel Coding. Power-aware Computing Systems 2005 - 2004
- [c39]Frank Kienle, Norbert Wehn:
Design methodology for IRA codes. ASP-DAC 2004: 459-462 - [c38]Friedbert Berens, Gerd Kreiselmaier, Norbert Wehn:
Channel Decoder Architecture for 3G Mobile Wireless Terminals. DATE 2004: 192-197 - [c37]Frank Kienle, Norbert Wehn:
Joint graph-decoder design of IRA codes on scalable architectures [LDPC codes]. ICASSP (4) 2004: 673-676 - [c36]Armin Wellig, Julien Zory, Norbert Wehn:
Energy- and Area-Efficient Deinterleaving Architecture for High-Throughput Wireless Applications. PATMOS 2004: 218-227 - [c35]Timo Vogt, Norbert Wehn, Philippe Alves:
A multi-standard channel-decoder for base-station applications. SBCCI 2004: 192-197 - [c34]Michael J. Thul, Norbert Wehn:
FPGA implementation of parallel turbo-decoders. SBCCI 2004: 198-203 - 2003
- [j9]Norbert Wehn:
System-on-Chip - Ein Sonderheft anlässlich des 60. Geburtstages von Prof. Dr. Dr. h.c. mult. Manfred Glesner. it Inf. Technol. 45(6): 309 (2003) - [j8]Norbert Wehn:
Vergleich von Hardware- und Software-Implementierungen in der digitalen Kommunikation am Beispiel der Kanalcodierung (Hardware-/Software Trade-Offs in Digital Communication Systems with Special Emphasis on Channel-Coding). it Inf. Technol. 45(6): 336-343 (2003) - [c33]Frank Gilbert, Michael J. Thul, Norbert Wehn:
Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors . DATE 2003: 10356-10363 - [c32]Michael J. Thul, Frank Gilbert, Norbert Wehn:
Concurrent interleaving architectures for high-throughput channel coding. ICASSP (2) 2003: 613-616 - [c31]Frank Kienle, Gerd Kreiselmaier, Norbert Wehn:
VLSI-implementation issues of turbo trellis-coded modulation. ICASSP (2) 2003: 633-636 - [c30]Frank Gilbert, Norbert Wehn:
Architecture-Driven Voltage Scaling for High-Throughput Turbo-Decoders. PATMOS 2003: 379-388 - [e1]Ahmed Amine Jerraya, Sungjoo Yoo, Diederik Verkest, Norbert Wehn:
Embedded Software for SoC. Kluwer / Springer 2003, ISBN 978-1-4020-7528-5 [contents] - 2002
- [c29]Heiko Michel, Alexander Worm, Norbert Wehn, Michael Münch:
Hardware/Software Trade-Offs for Advanced 3G Channel Coding. DATE 2002: 396-401 - [c28]Michael J. Thul, Timo Vogt, Frank Gilbert, Norbert Wehn:
Evaluation of algorithm optimizations for low-power Turbo-Decoder implementations. ICASSP 2002: 3101-3104 - [c27]Michael J. Thul, Frank Gilbert, Norbert Wehn:
Optimized concurrent interleaving architecture for high-throughput turbo-decoding. ICECS 2002: 1099-1102 - [c26]Michael J. Thul, Norbert Wehn, L. P. Rao:
Enabling high-speed turbo-decoding through concurrent interleaving. ISCAS (1) 2002: 897-900 - [c25]Gerd Kreiselmaier, Timo Vogt, Norbert Wehn, Friedbert Berens:
Combined Turbo and Convolutional Decoder Architecture for UMTS Wireless Applications. SBCCI 2002: 337-344 - 2001
- [j7]Doris Keitel-Schulz, Norbert Wehn:
Embedded DRAM Development: Technology, Physical Design, and Application Issues. IEEE Des. Test Comput. 18(3): 7-15 (2001) - [j6]Heiko Michel, Norbert Wehn:
Turbo-decoder quantization for UMTS. IEEE Commun. Lett. 5(2): 55-57 (2001) - [c24]Frank Gilbert, Alexander Worm, Norbert Wehn:
Low power implementation of a turbo-decoder on programmable architectures. ASP-DAC 2001: 400-403 - [c23]Alexander Worm, Holger Lamm, Norbert Wehn:
Design of low-power high-speed maximum a priori decoder architectures. DATE 2001: 258-267 - [c22]Doris Keitel-Schulz, Norbert Wehn, Francky Catthoor, Preeti Ranjan Panda:
Embedded Memories in System Design: Technology, Application, Design and Tools. VLSI Design 2001: 5-6 - [c21]Alexander Worm, Holger Lamm, Norbert Wehn:
Vlsi Architectures For High-Speed Map Decoders. VLSI Design 2001: 446-453 - 2000
- [j5]Alexander Worm, Peter A. Hoeher, Norbert Wehn:
Turbo-decoding without SNR estimation. IEEE Commun. Lett. 4(6): 193-195 (2000) - [c20]Michael Münch, Norbert Wehn, Bernd Wurth, Renu Mehra, Jim Sproch:
Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths. DATE 2000: 624-631
1990 – 1999
- 1998
- [c19]Norbert Wehn, Søren Hein:
Embedded DRAM Architectural Trade-Offs. DATE 1998: 704-708 - [c18]Doris Keitel-Schulz, Norbert Wehn:
Issues in Embedded DRAM Development and Applications. ISSS 1998: 23-30 - 1997
- [j4]Michael Münch, Norbert Wehn, Manfred Glesner:
An efficient ILP-based scheduling algorithm for control-dominated VHDL descriptions. ACM Trans. Design Autom. Electr. Syst. 2(4): 344-364 (1997) - 1996
- [c17]Michael Münch, Manfred Glesner, Norbert Wehn:
An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions. ISSS 1996: 45-50 - 1995
- [c16]U. Zahm, Thomas Hollstein, Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner:
Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. FPL 1995: 241-250 - 1994
- [j3]Régis Leveugle, Zahava Koren, Israel Koren, Gabriele Saucier, Norbert Wehn:
The Hyeti Defect Tolerant Microprocessor: A Practical Experiment and its Cost-Effectiveness Analysis. IEEE Trans. Computers 43(12): 1398-1406 (1994) - [c15]Norbert Wehn, Jörg Biesenack, Peter Duzy, T. Langmaier, Michael Münch, Michael Pilsl, Steffen Rumler:
Scheduling of behavioral VHDL by retiming techniques. EURO-DAC 1994: 546-551 - [c14]Bernd Wurth, Norbert Wehn:
Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization. EDAC-ETC-EUROASIC 1994: 630-634 - 1993
- [j2]Jörg Biesenack, Michael Koster, Anton Langmaier, Stephane Ledeux, Sabine März, Michael Payer, Michael Pilsl, Steffen Rumler, Holger Soukup, Norbert Wehn, Peter Duzy:
The Siemens high-level synthesis system CALLAS. IEEE Trans. Very Large Scale Integr. Syst. 1(3): 244-253 (1993) - [c13]Michael Gasteier, Norbert Wehn, Manfred Glesner:
Synthesis of complex VHDL operators. EURO-DAC 1993: 566-571 - [c12]Norbert Wehn, Manfred Glesner, C. Vielhauer:
Estimating lower hardware bounds in high-level synthesis. VLSI 1993: 261-270 - 1992
- [c11]Norbert Wehn, Hans-Jürgen Herpel, Thomas Hollstein, Peter Poechmueller, Manfred Glesner:
High-level synthesis in a rapid-prototype environment for mechatronic systems. EURO-DAC 1992: 188-193 - [c10]Jörg Biesenack, Norbert Wehn, A. Stoll, Michael Payer:
Data Part Optimizations in the CALLAS Synthesis Environment. Synthesis for Control Dominated Circuits 1992: 263-274 - 1991
- [c9]Norbert Wehn, Manfred Glesner:
A new approach to timing driven partitioning of combinational logic. Great Lakes Symposium on VLSI 1991: 96-101 - [c8]Peter Poechmueller, Michael Held, Norbert Wehn, Manfred Glesner:
HADES-high-level architecture development and exploration system. Great Lakes Symposium on VLSI 1991: 342-343 - [c7]Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner:
RAMSES-a rapid prototyping environment for embedded control applications. RSP 1991: 27-33 - [c6]Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner:
Verifikation mikroelektronischer Systeme zur Prozeßsteuerung durch schnelle Prototypenrealisierung. ASIM 1991: 567-572 - [c5]Norbert Wehn, Jörg Biesenack, Michael Pilsl:
A New Approach to Multiplexer Minimisation in the CALLAS Synthesis Environment. VLSI 1991: 203-213 - [c4]A. Laudenbach, Manfred Glesner, Norbert Wehn:
A VLSI System Design for the Control of High Performance Combustion Engines. VLSI 1991: 247-256 - 1990
- [c3]Norbert Wehn, Manfred Glesner, A. Kister, S. Kastner:
Timing Driven Partitioning of Combinational Logic. Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme 1990: 42-51
1980 – 1989
- 1989
- [b1]Norbert Wehn:
Effiziente Verfahren für den physikalischen Entwurf von MOS-VLSI-Schaltungen und ihre Anwendung beim Entwurf eines defekttoleranten Mikroprozessors. Darmstadt University of Technology, Germany, 1989, pp. 1-167 - 1988
- [c2]Norbert Wehn, Manfred Glesner, K. Caesar, P. Mann, A. Roth:
A Defect-Tolerant and Fully Testable PLA. DAC 1988: 22-33 - 1987
- [c1]Johannes Schuck, Norbert Wehn, Manfred Glesner, G. Kamp:
The ALGIC Silicon Compiler System: Implementation, Design Experience and Results. DAC 1987: 370-375 - 1986
- [j1]Norbert Wehn, Manfred Glesner:
Statische und dynamische CMOS-Schaltungstechniken im Vergleich. it Inf. Technol. 28(3): 142-149 (1986)
Coauthor Index
Christina Gimmler-Dumont
aka: Christina Gimmler
aka: Christina Gimmler
[c270] [c262] [c255] [j54] [j53] [c242] [c241] [i14] [i13] [j42] [c233] [c232] [c221] [c220] [c219] [j36] [c215] [c210] [c208] [c207] [c204] [c202] [i11] [c198] [c197] [c196] [c195] [c191] [c190] [i9] [j35] [c188] [c186] [c181] [c177] [c176] [c174] [c173] [i8] [j33] [j32] [j31] [j30] [c164] [c163] [c162] [c161] [c160] [c159] [j28] [c153] [c152] [c144] [c143] [c142] [c141] [j26] [c138] [c135] [c134] [c133] [c129] [c123] [c113] [c102] [c83]
Carl Christian Rheinländer
aka: Carl Rheinländer
aka: Carl Rheinländer
Mehdi Baradaran Tahoori
aka: Mehdi B. Tahoori
aka: Mehdi B. Tahoori
[c280] [c274] [c271] [c269] [c268] [c266] [c265] [j57] [c264] [c258] [j54] [c253] [c252] [c247] [c243] [c240] [c236] [j45] [j42] [j41] [c233] [c232] [c231] [c230] [c220] [j39] [j37] [j36] [c211] [c210] [c209] [c208] [c207] [c204] [i11] [c196] [c195] [c192] [c191] [c190] [i9] [j35] [c188] [c186] [c182] [c181] [c177] [c176] [i8] [j33] [j32] [j31] [j30] [c169] [c164] [c163] [c162] [j28] [c153] [c152] [c151] [c144] [c143] [c142] [j26] [j25] [c138] [c135] [c134] [c133] [c129] [j24] [c125] [c123] [c113] [j21] [j19] [c109] [c107] [c105] [c102] [j17] [c98] [c97] [c93] [c92] [c91] [c86] [c85]
Éder Zulian
aka: Éder F. Zulian
aka: Éder F. Zulian
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