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ORCIDJoan Carletta
2010 – 2019
- 2017
[c35]Sainath Reddy Samireddy, Joan Carletta, Kye-Shin Lee:
An embeddable algorithm for gunshot detection. MWSCAS 2017: 68-71- [c34]Abdullah Kurtoglu, Joan Carletta, Kye-Shin Lee:
Energy consumption in long-range linear wireless sensor networks using LoRaWan and ZigBee. MWSCAS 2017: 1163-1167 - [c33]Taohid Latif, Nathan Ida, Kye-Shin Lee, Joan Carletta:
A current and vibration based detection system for lightning strikes on transmission towers. MWSCAS 2017: 1272-1275 - 2016
- [j13]Jian Liu, Firas Hassan, Joan Carletta:
A study of hardware-friendly methods for gradient domain tone mapping of high dynamic range images. J. Real Time Image Process. 12(1): 165-181 (2016) - 2015
- [c32]Firas Hassan, Joao Lucas Magalini, Victor de Campos Pentea, Joan E. Carletta:
A Booth-like modulo operator. MWSCAS 2015: 1-4 - 2013
- [j12]Cindy X. Jiang, Joan Carletta, Tom T. Hartley, Robert J. Veillette:
A Systematic Approach for Implementing Fractional-Order Operators and Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 3(3): 301-312 (2013) - [j11]Lavanya Vytla, Firas Hassan, Joan Carletta:
A real-time implementation of gradient domain high dynamic range compression using a local Poisson solver. J. Real Time Image Process. 8(2): 153-167 (2013) - [c31]Jian Liu, Firas Hassan, Joan Carletta:
Embedding high dynamic range tone mapping in JPEG compression. Image Processing: Algorithms and Systems 2013: 86550B - [c30]Shiva Sai Bethi, Kye-Shin Lee, Robert J. Veillette, Joan Carletta, Mike Willett:
A temperature and process insensitive CMOS reference current generator. MWSCAS 2013: 301-304 - [c29]Bo Liu, Matthew Kollarits, Robert J. Veillette, Joan Carletta, Kye-Shin Lee:
A high-temperature comparator with rail-to-rail input voltage range. MWSCAS 2013: 533-536 - 2012
- [c28]Arjuna Madanayake
, Chamith Wijenayake, Rimesh M. Joshi, Jim Grover, Joan Carletta, Jay L. Adams, Tom T. Hartley, Tokunbo Ogunfunmi:
Teaching freshmen VHDL-based digital design. ISCAS 2012: 2701-2704 - [c27]Joseph P. Davis, Joan E. Carletta, Robert J. Veillette, Li Du, Jiang Zhe:
Instrumentation circuitry for an inductive wear debris sensor. NEWCAS 2012: 501-504 - 2011
- [c26]D. R. Desai, Firas Hassan, Robert J. Veillette, Joan E. Carletta:
An analog logarithmic number system subtractor for edge detection in logarithmic CMOS image sensors. Sensors, Cameras, and Systems for Industrial, Scientific, and Consumer Applications 2011: 78750C
2000 – 2009
- 2009
- [c25]Firas Hassan, Lavanya Vytla, Joan Carletta:
Exploiting redundancy to solve the Poisson equation using local information. ICIP 2009: 2689-2692 - 2008
- [j10]Krishnaraj Varma, Hima B. Damecharla, Amy E. Bell, Joan Carletta, Godmar V. Back:
A Fast JPEG2000 Encoder That Preserves Coding Efficiency: The Split Arithmetic Encoder. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3711-3722 (2008) - [c24]Firas Hassan, Joan Carletta:
High throughput JPEG2000 compatible encoder for high dynamic range images. ICIP 2008: 1424-1427 - 2007
- [j9]Firas Hassan, Joan Carletta:
An FPGA-based architecture for a local tone-mapping operator. J. Real Time Image Process. 2(4): 293-308 (2007) - [c23]Firas Hassan, Joan Carletta:
A real-time FPGA-based architecture for a Reinhard-like tone mapping operator. Graphics Hardware 2007: 65-71 - [c22]S. M. N. Hasan, Iqbal Husain, Robert J. Veillette, Joan E. Carletta:
A PM Brushless DC Starter/Generator System for a Series-Parallel 2x2 Hybrid Electric Vehicle. IAS 2007: 1686-1693 - [c21]Firas Hassan, Joan Carletta:
A High Throughput Encoder for High Dynamic Range Images. ICIP (6) 2007: 213-216 - 2006
- [j8]Kishore A. Kotteri, Amy E. Bell, Joan Carletta:
Multiplierless filter Bank design: structures that improve both hardware and image compression performance. IEEE Trans. Circuits Syst. Video Technol. 16(6): 776-780 (2006) - [c20]Hima B. Damecharla, Kamal K. Varma, Joan Carletta, Amy E. Bell:
FPGA implementation of a parallel EBCOT tier-1 encoder that preserves coding efficiency. ACM Great Lakes Symposium on VLSI 2006: 266-271 - [c19]Krishnaraj Varma, Amy E. Bell, Hima B. Damecharla, Joan Carletta:
A Fast JPEG2000 EBCOT Tier-1 Architecture That Preserves Coding Efficiency. ICIP 2006: 3297-3300 - 2005
- [j7]Sankar Barua, Joan Carletta, Kishore A. Kotteri, Amy E. Bell:
An efficient architecture for lifting-based two-dimensional discrete wavelet transforms. Integr. 38(3): 341-352 (2005) - [j6]Kishore A. Kotteri, Sankar Barua, Amy E. Bell, Joan Carletta:
A comparison of hardware implementations of the biorthogonal 9/7 DWT: convolution versus lifting. IEEE Trans. Circuits Syst. II Express Briefs 52-II(5): 256-260 (2005) - [j5]Zhengwei Fang, Joan Carletta, Robert J. Veillette:
A methodology for FPGA-based control implementation. IEEE Trans. Control. Syst. Technol. 13(6): 977-987 (2005) - 2004
- [j4]Kishore A. Kotteri, Amy E. Bell, Joan Carletta:
Design of multiplierless, high-performance, wavelet filter banks with image compression applications. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(3): 483-494 (2004) - [c18]Sankar Barua, Joan Carletta, Kishore A. Kotteri, Amy E. Bell:
An efficient architecture for lifting-based two-dimensional discrete wavelet transforms. ACM Great Lakes Symposium on VLSI 2004: 61-66 - [c17]Sankar Barua, Kishore A. Kotteri, Amy E. Bell, Joan Carletta:
Optimal quantized lifting coefficients for the 9/7 wavelet [image compression applications]. ICASSP (5) 2004: 193-196 - [c16]Kishore A. Kotteri, Amy E. Bell, Joan Carletta:
Polyphase structures for multiplierless biorthogonal filter banks [image compression applications]. ICASSP (5) 2004: 197-200 - 2003
- [j3]Kishore A. Kotteri, Amy E. Bell, Joan Carletta:
Quantized FIR filter design using compensating zeros. IEEE Signal Process. Mag. 20(6): 60-67 (2003) - [c15]F. Krach, B. Frackelton, Joan Carletta, Robert J. Veillette:
FPGA-based implementation of digital control for a magnetic bearing. ACC 2003: 1080-1085 - [c14]Joan Carletta, Robert J. Veillette, Frederick W. Krach, Zhengwei Fang:
Determining appropriate precisions for signals in fixed-point IIR filters. DAC 2003: 656-661 - [c13]Joan Carletta, Robert J. Veillette, Frederick W. Krach, Zhengwei Fang:
Implementation of digital fixed-point approximations to continuous-time IIR filters. FPGA 2003: 241 - 2002
- [c12]Joan Carletta, M. D. Rayman:
Practical Considerations in the Synthesis of High Performance Digital Filters for Implementation on FPGAs. FPL 2002: 886-896 - 2001
- [j2]Mehrdad Nourani, Joan Carletta, Christos A. Papachristou:
Integrated test of interacting controllers and datapaths. ACM Trans. Design Autom. Electr. Syst. 6(3): 401-422 (2001) - 2000
- [c11]Mehrdad Nourani, Joan Carletta, Christos A. Papachristou:
Synthesis-for-testability of controller-datapath pairs that use gated clocks. DAC 2000: 613-618 - [c10]Joan Carletta, Christos A. Papachristou, Mehrdad Nourani:
Detecting Undetectable Controller Faults Using Power Analysis. DATE 2000: 723-728 - [c9]Elie Yarack, Joan Carletta:
An Evaluation of Move-Based Multi-Way Partitioning Algorithms. ICCD 2000: 363-369 - [c8]John T. Welch, Joan Carletta:
A Direct Mapping FPGA Architecture for Industrial Process Control Applications. ICCD 2000: 595-598
1990 – 1999
- 1999
- [c7]Joan Carletta, Mehrdad Nourani, Christos A. Papachristou:
Synthesis of Controllers for Full Testability of Integrated Datapath-Controller Pairs. DATE 1999: 278-282 - 1997
- [j1]Joan Carletta, Christos A. Papachristou:
Behavioral Testability Insertion for Datapath/Controller Circuits. J. Electron. Test. 11(1): 9-28 (1997) - [c6]Mehrdad Nourani, Joan Carletta, Christos A. Papachristou:
A Scheme for Integrated Controller-Datapath Fault Testing. DAC 1997: 546-551 - 1995
- [c5]Joan Carletta, Christos A. Papachristou:
A method for testability analysis and BIST insertion at the RTL. ED&TC 1995: 600 - [c4]Joan Carletta, Christos A. Papachristou:
Testability analysis and insertion for RTL circuits based on pseudorandom BIST. ICCD 1995: 162-167 - [c3]Christos A. Papachristou, Joan Carletta:
Test Synthesis in the Behavioral Domain. ITC 1995: 693-702 - [c2]Joan Carletta, Christos A. Papachristou:
Structural constraints for circular self-test paths. VTS 1995: 486-491 - 1994
- [c1]Joan Carletta, Christos A. Papachristou:
Structural constraints for circular self-test paths. VTS 1994: 87-92
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