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2000 – 2009
- 2008
[j5]Peter Rounce, Alberto Ferreira de Souza
:
Dynamic Instruction Scheduling in a Trace-based Multi-threaded Architecture. Int. J. Parallel Program. 36(2): 184-205 (2008)- [c7]Alberto Ferreira de Souza, Sotério Ferreira de Souza, Claudio Luis de Amorim, Priscila M. V. Lima, Peter Rounce:
Hardware Supported Synchronization Primitives for Clusters. PDPTA 2008: 520-526 - 2006
- [c6]Peter Rounce, Alberto Ferreira de Souza:
The mDTSVLIW: a Multi-Threaded Trace-based VLIW Architecture. SBAC-PAD 2006: 63-72 - 2000
- [j4]Alberto Ferreira de Souza, Peter Rounce:
Dynamically Scheduling VLIW Instructions. J. Parallel Distributed Comput. 60(12): 1480-1511 (2000) - [c5]Alberto Ferreira de Souza, Peter Rounce:
On the Scheduling Algorithm of the Dynamically Trace Scheduled VLIW Architecture. IPDPS 2000: 565-572
1990 – 1999
- 1999
- [c4]Alberto Ferreira de Souza, Peter Rounce:
Effect of Multicycle Intructions on the Integer Performance of the Dynamixcally Trace Scheduled VLIW Architecture. HPCN Europe 1999: 1203-1206 - [c3]Alberto Ferreira de Souza, Peter Rounce:
Dynamically Scheduling the Trace Produced During Program Execution into VLIW Instructions. IPPS/SPDP 1999: 248-257 - 1998
- [c2]Alberto Ferreira de Souza, Peter Rounce:
Dynamically Trace Scheduled VLIW Architectures. HPCN Europe 1998: 993-995 - 1994
- [j3]Jens-Uwe Dzikowski, Peter Rounce:
Using databases to support the development of microcode. Microprocess. Microsystems 18(9): 537-546 (1994) - 1993
- [j2]Nigel Chapman, Maria Fox, Elpida Keravnou, Matthew Lee, Mark Levene, Derek Long, Peter Rounce, Ray Offen, Paul A. Samet, Russel L. Winder:
'Slick Systems' and 'Happy Hackers': experience with group projects at UCL. Softw. Eng. J. 8(3): 132-136 (1993) - [c1]Richard P. Palmer, Peter Rounce:
An Architecture for Implementing Control and Signal Processing Neural Networks. IWANN 1993: 702-707 - 1990
- [j1]Peter Rounce, Jose Delgado:
Architectures within the ESPRIT SPAN project. IEEE Micro 10(6): 24-27 (1990)
Coauthor Index
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