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2020 – today
- 2023
[c9]Maziar Amiraski, David Werner, Alexander Hankin, Julien Sebot, Kaushik Vaidyanathan, Mark Hempstead
:
Boreas: A Cost-Effective Mitigation Method for Advanced Hotspots using Machine Learning and Hardware Telemetry. ISPASS 2023: 295-305- 2021
- [c8]Alexander Hankin, David Werner, Maziar Amiraski, Julien Sebot, Kaushik Vaidyanathan, Mark Hempstead:
HotGauge: A Methodology for Characterizing Advanced Hotspots in Modern and Next Generation Processors. IISWC 2021: 163-175
2010 – 2019
- 2018
- [c7]Lavanya Subramanian, Kaushik Vaidyanathan, Anant Nori, Sreenivas Subramoney, Tanay Karnik, Hong Wang:
Closed yet open DRAM: achieving low latency and high performance in DRAM memory systems. DAC 2018: 170:1-170:6 - 2015
- [c6]Huseyin Ekin Sumbul, Kaushik Vaidyanathan, Qiuling Zhu, Franz Franchetti, Larry T. Pileggi:
A synthesis methodology for application-specific logic-in-memory designs. DAC 2015: 196:1-196:6 - [i1]Kaushik Vaidyanathan:
Exploiting Challenges of Sub-20 nm CMOS for Affordable Technology Scaling. CoRR abs/1509.00885 (2015) - 2014
- [c5]Kaushik Vaidyanathan, Bishnu Prasad Das, Larry T. Pileggi:
Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack. DAC 2014: 156:1-156:6 - [c4]Kaushik Vaidyanathan, Bishnu Prasad Das, Huseyin Ekin Sumbul, Renzhi Liu, Larry T. Pileggi:
Building trusted ICs using split fabrication. HOST 2014: 1-6 - [c3]Kaushik Vaidyanathan, Renzhi Liu, Huseyin Ekin Sumbul, Qiuling Zhu, Franz Franchetti, Larry T. Pileggi:
Efficient and secure intellectual property (IP) design with split fabrication. HOST 2014: 13-18 - [c2]Kaushik Vaidyanathan, Lars Liebmann, Andrzej J. Strojwas, Larry T. Pileggi:
Sub-20 nm design technology co-optimization for standard cell logic. ICCAD 2014: 124-131 - 2012
- [c1]Qiuling Zhu, Kaushik Vaidyanathan, Ofer Shacham, Mark Horowitz, Larry T. Pileggi, Franz Franchetti:
Design Automation Framework for Application-Specific Logic-in-Memory Blocks. ASAP 2012: 125-132
Coauthor Index
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