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2020 – today
- 2024
[j10]V. K. Surya
, Suraj Kumar Prusty, Bibhu Datta Sahoo, Nijwm Wary:
Energy Efficient Resistor-Transconductor Hybrid-Based Full-Duplex Transceiver for Serial Link. IEEE Trans. Circuits Syst. I Regul. Pap. 71(12): 6569-6581 (2024)- [j9]Suraj Kumar Prusty, V. K. Surya, Nijwm Wary:
Energy Efficient Integrated Summer and Latch-Based DFE With Reduced Tap Loading. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 1779-1783 (2024) - [c11]Jahnvi Singh, Nijwm Wary, Pradip Mandal:
Use of current-mode and voltage-mode receivers together for on-chip multipoint-to-multipoint data transmission across global interconnects. VLSID 2024: 73-78 - 2023
- [c10]V. K. Surya, Suraj Kumar Prusty, Nijwm Wary:
A 26 Gb/s Echo-Cancellation Based Simultaneous Bidirectional Transceiver in 65 nm CMOS. ISCAS 2023: 1-5 - [c9]Sahil Dalvi, Pilli Kalyan Kumar, Olive Ray, Nijwm Wary:
A Fully Integrated SCC DC-DC Converter with Novel FMC Controller for Fast Transient Response. NEWCAS 2023: 1-5 - [c8]Suraj Kumar Prusty, V. K. Surya, Nijwm Wary:
A High-Speed Charge-Injection based Double Tail Latch for Decision Feedback Equalizer (DFE). NEWCAS 2023: 1-5 - 2022
- [j8]Bhimraj Basumatary, Nijwm Wary, Jeevan Krishna Khaklary, Harish Garg:
Fuzzy VIKOR approach to identify COVID-19 vulnerability region to control third wave in Assam, India. J. Intell. Fuzzy Syst. 43(4): 4555-4564 (2022) - [j7]Poorna Chandrika Kondeti, Suraj Kumar Prusty, Nijwm Wary:
Current-integrating summer for DFE receiver with low common mode variation. Microelectron. J. 123: 105408 (2022) - [c7]Prema Kumar Govindaswamy, Nijwm Wary, Vijaya Sankara Rao Pasupureddi:
Power Efficient Echo-Cancellation Based Hybrid for Full-Duplex Chip-to-Chip Interconnects. ISCAS 2022: 852-856 - [c6]Prema Kumar Govindaswamy, Nijwm Wary, Vijaya Sankara Rao Pasupureddi:
A Low-Power Half-Rate Charge-Steering Hybrid for Full-Duplex Chip-to-Chip Interconnects. ISCAS 2022: 857-861 - [c5]Nishant Maurya, Nijwm Wary:
Design and Analysis of PVT Invariant Current Reference in 65-nm CMOS. MWSCAS 2022: 1-4 - 2021
- [j6]Behraz Vatankhahghadim, Nijwm Wary, James Bailey, Anthony Chan Carusone:
A Study of Discrete Multitone Modulation for Wireline Links Beyond 100 Gb/s. IEEE Open J. Circuits Syst. 2: 78-90 (2021) - [j5]Bhimraj Basumatary, Nijwm Wary, Dimacha Dwibrang Mwchahary, Ashoke Kumar Brahma, Jwngsar Moshahary, Usha Rani Basumatary, Jili Basumatary:
A Study on Some Properties of Neutrosophic Multi Topological Group. Symmetry 13(9): 1689 (2021) - 2020
- [j4]Nijwm Wary, Antroy Roy Chowdhury, Pradip Mandal:
Hybrid bidirectional transceiver for multipoint-to-multipoint signalling across on-chip global interconnects. IET Circuits Devices Syst. 14(6): 780-787 (2020) - [c4]Paul Wenbo Chen, Nijwm Wary, Luke Wang, Qiwei Wang, Anthony Chan Carusone:
All-Digital Calibration Algorithms to Correct for Static Non-Linearities in ADCs. ISCAS 2020: 1-5 - [c3]Behraz Vatankhahghadim, Nijwm Wary, Anthony Chan Carusone:
Discrete Multitone Signalling for Wireline Communication. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [c2]Antroy Roy Chowdhury, Nijwm Wary, Pradip Mandal:
A Regulated-Cascode Based Current-Integrating TIA RX with 1-tap Speculative Adaptive DFE. MWSCAS 2019: 790-793 - [c1]Antroy Roy Chowdhury, Nijwm Wary, Pradip Mandal:
Energy Efficient Bidirectional Equalized Transceiver with PVT Insensitive Active Termination. VLSID 2019: 25-30 - 2017
- [j3]Nijwm Wary, Pradip Mandal:
Current-Mode Full-Duplex Transceiver for Lossy On-Chip Global Interconnects. IEEE J. Solid State Circuits 52(8): 2026-2037 (2017) - [j2]Nijwm Wary, Pradip Mandal:
Current-Mode Triline Transceiver for Coded Differential Signaling Across On-Chip Global Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2575-2587 (2017) - 2015
- [j1]Nijwm Wary, Pradip Mandal:
High-speed energy-efficient bi-directional transceiver for on-chip global interconnects. IET Circuits Devices Syst. 9(5): 319-327 (2015)
Coauthor Index
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last updated on 2025-01-09 19:32 CET by the dblp team
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