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Kentaro Yoshioka
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2020 – today
- 2024
- [j16]Kaoru Yamashita, Benjamin P. Hershberg, Kentaro Yoshioka, Hiroki Ishikuro:
A 4.6-400 K Functional Ringamp-Based 250 MS/s 12 b Pipelined ADC With PVT-Robust Unity-Gain-Frequency-Aware Bias Calibration. IEEE J. Solid State Circuits 59(3): 740-752 (2024) - [c20]Yung-Chin Chen, Shimpei Ando, Daichi Fujiki, Shinya Takamaeda-Yamazaki, Kentaro Yoshioka:
OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration. ASPDAC 2024: 539-544 - [c19]Kentaro Yoshioka:
34.5 A 818-4094TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and Transformers. ISSCC 2024: 574-576 - [c18]Takami Sato, Yuki Hayakawa, Ryo Suzuki, Yohsuke Shiiki, Kentaro Yoshioka, Qi Alfred Chen:
LiDAR Spoofing Meets the New-Gen: Capability Improvements, Broken Assumptions, and New Attack Strategies. NDSS 2024 - [i11]Wenlun Zhang, Shimpei Ando, Yung-Chin Chen, Satomi Miyagi, Shinya Takamaeda-Yamazaki, Kentaro Yoshioka:
PACiM: A Sparsity-Centric Hybrid Compute-in-Memory Architecture via Probabilistic Approximation. CoRR abs/2408.16246 (2024) - [i10]Kentaro Yoshioka, Shimpei Ando, Satomi Miyagi, Yung-Chin Chen, Wenlun Zhang:
A Review of SRAM-based Compute-in-Memory Circuits. CoRR abs/2411.06079 (2024) - [i9]Wenlun Zhang, Shimpei Ando, Yung-Chin Chen, Kentaro Yoshioka:
ASiM: Improving Transparency of SRAM-based Analog Compute-in-Memory Research with an Open-Source Simulation Framework. CoRR abs/2411.11022 (2024) - 2023
- [c17]Kaoru Yamashita, Benjamin P. Hershberg, Kentaro Yoshioka, Hiroki Ishikuro:
A 4.6K to 400K Functional PVT-Robust Ringamp-Based 250MS/s 12b Pipelined ADC with Pole-Aware Bias Calibration. CICC 2023: 1-2 - [i8]Kentaro Yoshioka:
An 818-TOPS/W CSNR-31dB SQNR-45dB 10-bit Capacitor-Reconfiguring Computing-in-Memory Macro with Software-Analog Co-Design for Transformers. CoRR abs/2302.06463 (2023) - [i7]Takami Sato, Yuki Hayakawa, Ryo Suzuki, Yohsuke Shiiki, Kentaro Yoshioka, Qi Alfred Chen:
Revisiting LiDAR Spoofing Attack Capabilities against Object Detection: Improvements, Measurement, and New Attack. CoRR abs/2303.10555 (2023) - [i6]Yung-Chin Chen, Shimpei Ando, Daichi Fujiki, Shinya Takamaeda-Yamazaki, Kentaro Yoshioka:
OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration. CoRR abs/2308.15040 (2023) - [i5]Yung-Chin Chen, Shimpei Ando, Daichi Fujiki, Shinya Takamaeda-Yamazaki, Kentaro Yoshioka:
HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling. CoRR abs/2312.06086 (2023) - 2022
- [j15]Kentaro Yoshioka:
Time-Based Current Source: A Highly Digital Robust Current Generator for Switched Capacitor Circuits. IEICE Trans. Electron. 105-C(7): 324-333 (2022) - [j14]Kentaro Yoshioka:
A Tutorial and Review of Automobile Direct ToF LiDAR SoCs: Evolution of Next-Generation LiDARs. IEICE Trans. Electron. 105-C(10): 534-543 (2022) - [c16]Takami Sato, Yuki Hayakawa, Ryo Suzuki, Yohsuke Shiiki, Kentaro Yoshioka, Qi Alfred Chen:
Poster: Towards Large-Scale Measurement Study on LiDAR Spoofing Attacks against Object Detection. CCS 2022: 3459-3461 - 2021
- [j13]Kentaro Yoshioka:
VCO-Based Comparator: A Fully Adaptive Noise Scaling Comparator for High-Precision and Low-Power SAR ADCs. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2143-2152 (2021) - [c15]Kentaro Yoshioka, Hidenori Okuni, Tuan Thanh Ta, Akihide Sai:
Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections. IROS 2021: 1578-1584 - [i4]Kentaro Yoshioka, Hidenori Okuni, Tuan Thanh Ta, Akihide Sai:
Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections. CoRR abs/2108.13599 (2021) - 2020
- [j12]Satoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto:
An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm2 Voltage/Time Dual-Data-Converter-Based AFE. IEEE J. Solid State Circuits 55(11): 2866-2877 (2020) - [c14]Satoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto:
5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm2 Voltage/Time Dual-Data-Converter-Based AFE. ISSCC 2020: 94-96 - [c13]Tuan Thanh Ta, Hiroshi Kubota, Koichi Kokubun, Toshiki Sugimoto, Masatoshi Hirono, Mitsuhiro Sengoku, Hisaaki Katagiri, Hidenori Okuni, Satoshi Kondo, Shinichi Ohtsuka, Honam Kwon, Keita Sasaki, Yutaka Ota, Kazuhiro Suzuki, Katsuyuki Kimura, Kentaro Yoshioka, Akihide Sai, Nobu Matsumoto:
A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDAR. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j11]Yosuke Toyama, Kentaro Yoshioka, Koichiro Ban, Shigeru Maya, Akihide Sai, Kohei Onizuka:
An 8 Bit 12.4 TOPS/W Phase-Domain MAC Circuit for Energy-Constrained Deep Learning Accelerators. IEEE J. Solid State Circuits 54(10): 2730-2742 (2019) - [j10]Kentaro Yoshioka, Tomohiko Sugimoto, Naoya Waki, Sinnyoung Kim, Daisuke Kurose, Hirotomo Ishii, Masanori Furuta, Akihide Sai, Hiroki Ishikuro, Tetsuro Itakura:
Digital Amplifier: A Power-Efficient and Process-Scaling Amplifier for Switched Capacitor Circuits. IEEE Trans. Very Large Scale Integr. Syst. 27(11): 2575-2586 (2019) - [c12]Kentaro Yoshioka, Edward Lee, Simon Wong, Mark Horowitz:
Dataset Culling: Towards Efficient Training of Distillation-Based Domain Specific Models. ICIP 2019: 3237-3241 - [i3]Kentaro Yoshioka, Edward Lee, Simon Wong, Mark Horowitz:
Dataset Culling: Towards Efficient Training Of Distillation-Based Domain Specific Models. CoRR abs/1902.00173 (2019) - 2018
- [j9]Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Masatoshi Hirono, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiko Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto:
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC. IEEE J. Solid State Circuits 53(11): 3026-3038 (2018) - [j8]Shusuke Kawai, Rui Ito, Kengo Nakata, Yutaka Shimizu, Motoki Nagata, Tomohiko Takeuchi, Hiroyuki Kobayashi, Katsuyuki Ikeuchi, Takayuki Kato, Yosuke Hagiwara, Yuki Fujimura, Kentaro Yoshioka, Shigehito Saigusa, Hiroshi Yoshida, Makoto Arai, Toshiyuki Yamagishi, Hirotsugu Kajihara, Kazuhisa Horiuchi, Hideki Yamada, Tomoya Suzuki, Yuki Ando, Kensuke Nakanishi, Koichiro Ban, Masahiro Sekiya, Yoshimasa Egashira, Tsuguhide Aoki, Kohei Onizuka, Toshiya Mitomo:
An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer. IEEE J. Solid State Circuits 53(12): 3688-3699 (2018) - [c11]Yosuke Toyama, Kentaro Yoshioka, Koichiro Ban, Akihide Sai, Kohei Onizuka:
A 12.4TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications. A-SSCC 2018: 1-4 - [c10]Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiro Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto:
A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique. ISSCC 2018: 92-94 - [c9]Shusuke Kawai, Hiromitsu Aoyama, Rui Ito, Yutaka Shimizu, Mitsuyuki Ashida, Asuka Maki, Tomohiko Takeuchi, Hiroyuki Kobayashi, Go Urakawa, Hiroaki Hoshino, Shigehito Saigusa, Kazushi Koyama, Makoto Morita, Ryuichi Nihei, Daisuke Goto, Motoki Nagata, Kengo Nakata, Katsuyuki Ikeuchi, Kentaro Yoshioka, Ryoichi Tachibana, Makoto Arai, Chen Kong Teh, Atsushi Suzuki, Hiroshi Yoshida, Yosuke Hagiwara, Takayuki Kato, Ichiro Seto, Tomoya Horiguchi, Koichiro Ban, Kyosuke Takahashi, Hirotsugu Kajihara, Toshiyuki Yamagishi, Yuki Fujimura, Kazuhisa Horiuchi, Katsuya Nonin, Kengo Kurose, Hideki Yamada, Kentaro Taniguchi, Masahiro Sekiya, Takeshi Tomizawa, Daisuke Taki, Masaaki Ikuta, Tomoya Suzuki, Yuki Ando, Daisuke Yashima, Takahisa Kaihotsu, Hiroki Mori, Kensuke Nakanishi, Takeshi Kumagaya, Yasuo Unekawa, Tsuguhide Aoki, Kohei Onizuka, Toshiya Mitomo:
An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer. ISSCC 2018: 442-444 - [c8]Kentaro Yoshioka, Yosuke Toyama, Koichiro Ban, Daisuke Yashima, Shigeru Maya, Akihide Sai, Kohei Onizuka:
PhaseMAC: A 14 TOPS/W 8bit GRO Based Phase Domain MAC Circuit for in-Sensor-Computed Deep Learning Accelerators. VLSI Circuits 2018: 263-264 - [i2]Kentaro Yoshioka, Yosuke Toyama, Koichiro Ban, Daisuke Yashima, Shigeru Maya, Akihide Sai, Kohei Onizuka:
PhaseMAC: A 14 TOPS/W 8bit GRO based Phase Domain MAC Circuit for In-Sensor-Computed Deep Learning Accelerators. CoRR abs/1808.09335 (2018) - [i1]Kentaro Yoshioka, Edward Lee, Mark Horowitz:
Training Domain Specific Models for Energy-Efficient Object Detection. CoRR abs/1811.02689 (2018) - 2017
- [c7]Kentaro Yoshioka, Tomohiko Sugimoto, Naoya Waki, Sinnyoung Kim, Daisuke Kurose, Hirotomo Ishii, Masanori Furuta, Akihide Sai, Tetsuro Itakura:
28.7 A 0.7V 12b 160MS/s 12.8fJ/conv-step pipelined-SAR ADC in 28nm CMOS with digital amplifier technique. ISSCC 2017: 478-479 - 2015
- [j7]Kentaro Yoshioka, Ryo Saito, Takumi Danjo, Sanroku Tsukamoto, Hiroki Ishikuro:
Dynamic Architecture and Frequency Scaling in 0.8-1.2 GS/s 7 b Subranging ADC. IEEE J. Solid State Circuits 50(4): 932-945 (2015) - [j6]Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro:
An 8 bit 0.3-0.8 V 0.2-40 MS/s 2-bit/Step SAR ADC With Successively Activated Threshold Configuring Comparators in 40 nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 23(2): 356-368 (2015) - 2014
- [c6]Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro:
An 8b extremely area efficient threshold configuring SAR ADC with source voltage shifting technique. ASP-DAC 2014: 31-32 - [c5]Kentaro Yoshioka, Hiroki Ishikuro:
A 13b SAR ADC with eye-opening VCO based comparator. ESSCIRC 2014: 411-414 - [c4]Kentaro Yoshioka, Ryo Saito, Takumi Danjo, Sanroku Tsukamoto, Hiroki Ishikuro:
7-bit 0.8-1.2GS/s Dynamic Architecture and Frequency Scaling subrange ADC with binary-search/flash Live Configuring Technique. VLSIC 2014: 1-2 - 2013
- [j5]Akira Shikata, Ryota Sekimoto, Kentaro Yoshioka, Tadahiro Kuroda, Hiroki Ishikuro:
A 4-10 bit, 0.4-1 V Power Supply, Power Scalable Asynchronous SAR-ADC in 40 nm-CMOS with Wide Supply Voltage Range SAR Controller. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(2): 443-452 (2013) - [j4]Ryota Sekimoto, Akira Shikata, Kentaro Yoshioka, Tadahiro Kuroda, Hiroki Ishikuro:
An Adaptive DAC Settling Waiting Time Optimized Ultra Low Voltage Asynchronous SAR ADC in 40 nm CMOS. IEICE Trans. Electron. 96-C(6): 820-827 (2013) - [j3]Ryota Sekimoto, Akira Shikata, Kentaro Yoshioka, Tadahiro Kuroda, Hiroki Ishikuro:
A 0.5-V 5.2-fJ/Conversion-Step Full Asynchronous SAR ADC With Leakage Power Reduction Down to 650 pW by Boosted Self-Power Gating in 40-nm CMOS. IEEE J. Solid State Circuits 48(11): 2628-2636 (2013) - [c3]Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro:
A 0.35-0.8V 8b 0.5-35MS/s 2bit/step extremely-low power SAR ADC. ASP-DAC 2013: 111-112 - [c2]Kentaro Yoshioka, Yosuke Toyama, Teruo Jyo, Hiroki Ishikuro:
A voltage scaling 0.25-1.8 V delta-sigma modulator with inverter-opamp self-configuring amplifier. ISCAS 2013: 809-812 - 2012
- [c1]Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro:
An 8bit 0.35-0.8V 0.5-30MS/s 2bit/step SAR ADC with wide range threshold configuring comparator. ESSCIRC 2012: 381-384
2000 – 2009
- 2007
- [j2]Jun Yang, Anto Satriyo Nugroho, Kazunobu Yamauchi, Kentaro Yoshioka, Zheng Jiang, Kai Wang, Ken Kato, Susumu Kuroyanagi, Akira Iwata:
Efficacy of Interferon Treatment for Chronic Hepatitis C Predicted by Feature Subset Selection and Support Vector Machine. J. Medical Syst. 31(2): 117-123 (2007) - 2006
- [j1]Zheng Jiang, Kazunobu Yamauchi, Kentaro Yoshioka, Kazuma Aoki, Susumu Kuroyanagi, Akira Iwata, Jun Yang, Kai Wang:
Support Vector Machine-Based Feature Selection for Classification of Liver Fibrosis Grade in Chronic Hepatitis C. J. Medical Syst. 30(5): 389-394 (2006)
Coauthor Index
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