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ORCIDSavvas G. Chamberlain
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1990 – 1999
- 1995
[c1]S. M. GadelRab, James A. Barby, Savvas G. Chamberlain:
An Architecture for Integrated Reliability Simulators Using Analog Hardware Description Languages. ISCAS 1995: 897-900- 1992
- [j8]John R. F. McMacken, Savvas G. Chamberlain:
A numerical model for two-dimensional transient simulation of amorphous silicon thin-film transistors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(5): 629-637 (1992) - 1991
- [j7]Michael J. Van der Tol, Savvas G. Chamberlain:
Buried-channel MOSFET model for SPICE. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(8): 1015-1035 (1991) - 1990
- [j6]John R. F. McMacken, Savvas G. Chamberlain:
Analytic and iterative transit-time models for VLSI MOSFETs in strong inversion. IEEE J. Solid State Circuits 25(5): 1257-1267 (1990)
1980 – 1989
- 1989
- [j5]Paul Layman, Savvas G. Chamberlain:
A compact thermal noise model for the investigation of soft error rates in MOS VLSI digital circuits. IEEE J. Solid State Circuits 24(1): 79-89 (1989) - [j4]James W. Roberts, Savvas G. Chamberlain:
A CMOS model for computer-aided circuit analysis and design. IEEE J. Solid State Circuits 24(1): 128-138 (1989) - [j3]John R. F. McMacken, Savvas G. Chamberlain:
CHORD: a modular semiconductor device simulation development tool incorporating external network models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(8): 826-836 (1989) - 1984
- [j2]Constantine N. Anagnostopoulos, Savvas G. Chamberlain:
Foreword. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 3(1): 1-2 (1984) - 1980
- [j1]Robert J. Inkol, Savvas G. Chamberlain:
Design and Realization of a Two-Level 64K Byte CCD Memory System for Microcomputer Applications. IEEE Trans. Computers 29(2): 195-199 (1980)
Coauthor Index
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