An 802.11ax 4 exttimes 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer - Shusuke Kawai; Rui Ito; Kengo Nakata; Yutaka Shimizu; Motoki Nagata; Tomohiko Takeuchi; Hiroyuki Kobayashi; Katsuyuki Ikeuchi; Takayuki Kato; Yosuke Hagiwara; Yuki Fujimura; Kentaro Yoshioka; et al. (IEEE J. Solid State Circuits, 2018)

An 802.11ax 4 exttimes4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer - Shusuke Kawai; Hiromitsu Aoyama; Rui Ito; Yutaka Shimizu; Mitsuyuki Ashida; Asuka Maki; Tomohiko Takeuchi; Hiroyuki Kobayashi; Go Urakawa; Hiroaki Hoshino; Shigehito Saigusa; Kazushi Koyama; et al. (2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018, 2018)

Initial Assessment of Medium-Baseline Single-Epoch RTK Using GPS/BeiDou/QZSS - Nobuaki Kubo; Hideki Yamada; Tomoji Takasu (IEICE Trans. Commun., 2014)

High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors - Tomoya Suzuki; Hideki Yamada; Toshiyuki Yamagishi; Daisuke Takeda; Koji Horisaki; Tom Vander Aa; Toshio Fujisawa; Liesbet Van der Perre; Yasuo Unekawa (IEEE Micro, 2011)

A multimodal wireless baseband core using a coarse-grained dynamic reconfigurable processor - Hideki Yamada; Toshiyuki Yamagishi; Tomoya Suzuki; Kuniaki Ito; Koji Horisaki; Tom Vander Aa; Toshio Fujisawa; Liesbet Van der Perre; Yasuo Unekawa (2011 IEEE Symposium on Low-Power and High-Speed Chips, Cool Chips XIV, Yokohama, Japan, 20-22 April, 2011, 2011)

Automatic Pipeline Construction Focused on Similarity of Rate Law Functions for an FPGA-based Biochemical Simulator - Hideki Yamada; Yui Ogawa; Tomonori Ooya; Tomoya Ishimori; Yasunori Osana; Masato Yoshimi; Yuri Nishikawa; Akira Funahashi; Noriko Hiroi; Hideharu Amano; Yuichiro Shibata; Kiyoshi Oguri (IPSJ Trans. Syst. LSI Des. Methodol., 2010)

Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator - Tomoya Ishimori; Hideki Yamada; Yuichiro Shibata; Yasunori Osana; Masato Yoshimi; Yuri Nishikawa; Hideharu Amano; Akira Funahashi; Noriko Hiroi; Kiyoshi Oguri (Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings, 2009)

Configuring area and performance: Empirical evaluation on an FPGA-based biochemical simulator - Tomonori Ooya; Hideki Yamada; Tomoya Ishimori; Yuichiro Shibata; Yasunori Osana; Kiyoshi Oguri; Masato Yoshimi; Yuri Nishikawa; Akira Funahashi; Noriko Hiroi; Hideharu Amano (19th International Conference on Field Programmable Logic and Applications, FPL 2009, August 31 - September 2, 2009, Prague, Czech Republic, 2009)

A Modular Approach to Heterogeneous Biochemical Model Simulation on an FPGA - Hideki Yamada; Yasunori Osana; Tomoya Ishimori; Tomonori Ooya; Masato Yoshimi; Yuri Nishikawa; Akira Funahashi; Noriko Hiroi; Hideharu Amano; Yuichiro Shibata; Kiyoshi Oguri (ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, 2009)

Practical implementation of a network-based stochastic biochemical simulation system on an FPGA - Masato Yoshimi; Yuri Nishikawa; Yasunori Osana; Akira Funahashi; Yuichiro Shibata; Hideki Yamada; Noriko Hiroi; Hiroaki Kitano; Hideharu Amano (FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, 2008)

Adopting IPsec to SIP Network for On-Demand VPN Establishment between Home Networks - Shintaro Mizuno; Takahiro Haruyama; Hideki Yamada; Tsuyoshi Abe; Masahisa Kawashima; Osamu Mizuno (Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November - 4 December 2008, 2008)

An efficient solution for compositional design problems by Multi-stage Genetic Algorithm - Masakazu Suzuki; Yuki Hiyama; Hideki Yamada (22nd IEEE International Symposium on Intelligent Control, ISIC 2007, Singapore, October 1-3, 2007, 2007)

FPGA Implementation of a Data-Driven Stochastic Biochemical Simulator with the Next Reaction Method - Masato Yoshimi; Yow Iwaoka; Yuri Nishikawa; Toshinori Kojima; Yasunori Osana; Akira Funahashi; Noriko Hiroi; Yuichiro Shibata; Naoki Iwanaga; Hideki Yamada; Hiroaki Kitano; Hideharu Amano (FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, 2007)

A Combining technique of rate law functions for a cost-effective reconfigurable biological simulator - Hideki Yamada; Naoki Iwanaga; Yuichiro Shibata; Yasunori Osana; Masato Yoshimi; Yow Iwaoka; Yuri Nishikawa; Toshinori Kojima; Hideharu Amano; Akira Funahashi; Noriko Hiroi; Hiroaki Kitano; et al. (FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, 2007)

A Framework for Implementing a Network-Based Stochastic Biochemical Simulator on an FPGA - Masato Yoshimi; Yuri Nishikawa; Toshinori Kojima; Yasunori Osana; Akira Funahashi; Noriko Hiroi; Yuichiro Shibata; Hideki Yamada; Hiroaki Kitano; Hideharu Amano (2007 International Conference on Field-Programmable Technology, ICFPT 2007, Kitakyushu, Japan, December 12-14, 2007, 2007)

Chip Set for Real-Time Video Signal Processing - Nobuyuki Yagi; Ryoichi Yajima; Kazumasa Enami; Shigemi Mikami; Nobuyuki Sasaki; Kouji Hoshino; Kazuhiro Harukawa; Hideki Yamada (Proceedings of IAPR Workshop on Computer Vision - Special Hardware and Industrial Applications, MVA 1988, Tokyo, Japan, October 12-14, 1988, 1988)