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Alan Chang
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Other persons with a similar name
- Alan (Jaelyn) Chang
- Alan J. Chang
- Alan L. Chang
- Alan Shu-Luen Chang
- Michael Alan Chang
- Chin-Chen Chang 0001 (aka: Chinchen Chang 0001, Alan Chin-Chen Chang) — Feng Chia University, Department of Information Engineering and Computer Science, Taichung, Taiwan (and 5 more)
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2020 – today
- 2024
- [i1]Alan Chang, Assaf Naor, Kevin Ren:
Random zero sets with local growth guarantees. CoRR abs/2410.21931 (2024)
2010 – 2019
- 2018
- [j4]Van Loi Le, Juhui Li, Alan Chang, Tony Tae-Hyoung Kim:
A 0.4-V, 0.138-fJ/Cycle Single-Phase-Clocking Redundant-Transition-Free 24T Flip-Flop With Change-Sensing Scheme in 40-nm CMOS. IEEE J. Solid State Circuits 53(10): 2806-2817 (2018) - [j3]Lei Wang, Chundong Wu, Liang Zhang, Lisong Feng, Juhui Li, Alan Chang, Yong Lian:
An ADPLL-Based PSK Receiver for VHBR 13.56-MHz Contactless Smartcards and NFC Applications. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1624-1628 (2018) - [j2]Lei Wang, Chundong Wu, Lisong Feng, Alan Chang, Yong Lian:
A Low-Power Forward and Reverse Body Bias Generator in CMOS 40 nm. IEEE Trans. Very Large Scale Integr. Syst. 26(7): 1403-1407 (2018) - 2017
- [c10]Van Loi Le, Juhui Li, Alan Chang, Tony T. Kim:
An 82% energy-saving change-sensing flip-flop in 40nm CMOS for ultra-low power applications. A-SSCC 2017: 197-200 - [c9]Mini Jayakrishnan, Alan Chang, Tony T. Kim:
Library pruning and sigma corner libraries for power efficient variation tolerant processor pipelines. VLSI-SoC 2017: 1-6 - 2016
- [c8]Chundong Wu, Wang Ling Goh, Wei Mao, Lei Wang, Yat-Hei Lam, Alan Chang, Yong Lian:
A self biased full range current sensor for buck regulator. APCCAS 2016: 87-90 - [c7]Lei Wang, Wei Mao, Chundong Wu, Alan Chang, Yong Lian:
A fast transient LDO based on dual loop FVF with high PSRR. APCCAS 2016: 99-102 - [c6]Chundong Wu, Wang Ling Goh, Yongkui Yang, Alan Chang, Xi Zhu, Lei Wang:
A start-up free 200nW bandgap voltage reference. NEWCAS 2016: 1-4 - [c5]Mini Jayakrishnan, Alan Chang, Tae-Hyoung Kim:
Power and area efficient clock stretching and critical path reshaping for error resilience. VLSI-SoC 2016: 1-6 - 2015
- [c4]Mini Jayakrishnan, Alan Chang, José Pineda de Gyvez, Tae-Hyoung Kim:
Slack-aware timing margin redistribution technique utilizing error avoidance flip-flops and time borrowing. VLSI-SoC 2015: 159-164
2000 – 2009
- 2009
- [j1]Domine Leenaerts, Remco van de Beek, Jos Bergervoet, Harish Kundur, Gerard van der Weide, Ajay Kapoor, Tian Yan Pu, Yu Fang, Yujuan Wang, Biju Joseph Mukkada, Hong Sair Lim, Madhu Kiran, Chun Swee Lim, Sorin Badiu, Alan Chang:
A 65 nm CMOS Inductorless Triple Band Group WiMedia UWB PHY. IEEE J. Solid State Circuits 44(12): 3499-3510 (2009) - [c3]Domine Leenaerts, Remco van de Beek, Jos Bergervoet, Harish Kundur, Gerard van der Weide, Ajay Kapoor, Tian Yan Pu, Yu Fang, Yujuan Wang, Biju Joseph Mukkada, Hong Sair Lim, Madhu Kiran, Chun Swee Lim, Sorin Badiu, Alan Chang:
A 65nm CMOS inductorless triple-band-group WiMedia UWB PHY. ISSCC 2009: 410-411 - 2005
- [c2]Simon Sheu, Chang-Yeng Cheng, Alan Chang:
Fast Pattern Detection in Stream Data. AINA 2005: 125-130 - [c1]Simon Sheu, Alan Chang, Webber Huang:
Fast Similarity Search in String Databases. AINA 2005: 617-622
Coauthor Index
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