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ORCIDMicroelectronics Journal, Volume 66
Volume 66, August 2017
- Yarong Fu, Kai Yang, B. A. Chen, Yinyin Lin:
3D domain wall memory-cell structure, array architecture and operation algorithm with anti-disturbance. 1-8 - Majd H. Eid, Esther Rodríguez-Villegas:
Analysis and design of cross-coupled charge pump for low power on chip applications. 9-17 - Ibtisam A. Abbas Al-Darkazly, S. M. Rezaul Hasan
:
Optimized low-power CMOS active-electrode-pair for low-frequency multi-channel biomedical stimulation. 18-24 - Yuhua Liang, Zhangming Zhu:
A 0.6 V 31 nW 25 ppm/°C MOSFET-only sub-threshold voltage reference. 25-30 - Raqibul Hasan, Tarek M. Taha, Chris Yakopcic:
On-chip training of memristor crossbar based multi-layer neural networks. 31-40 - Chen Yan, Zhihua Gan, Emre Salman:
Package-embedded spiral inductor characterization with application to switching buck converters. 41-47 - Tong-Yu Hsieh, Kuan-Hsien Li, Chen-Chia Chung:
A fault-analysis oriented re-design and cost-effectiveness evaluation methodology for error tolerant applications. 48-57 - Shijun Liu, Xuecheng Zou:
QLC NAND study and enhanced Gray coding methods for sixteen-level-based program algorithms. 58-66 - Sadeque Reza Khan, GoangSeog Choi:
High-efficiency CMOS rectifier with minimized leakage and threshold cancellation features for low power bio-implants. 67-75 - E. S. Jeng, S. W. Chou, H. X. Chen, Y. L. Chiang:
Chip implementation of supervised neural network using single-transistor synapses. 76-83 - Chang Chua, R. B. N. Kumar:
An improved design and simulation of low-power and area efficient parallel binary comparator. 84-88 - Akash Singh Rawat, Santosh Kumar Gupta:
Potential modeling and performance analysis of junction-less quadruple gate MOSFETs for analog and RF applications. 89-102 - Syed Faizan-ul-Haq Gilani, Mohd Haris M. Khir, Rosdiazli Ibrahim, Emad ul Hassan Kirmani, Syed Ihtsham-ul-Haq Gilani:
Modelling and development of a vibration-based electromagnetic energy harvester for industrial centrifugal pump application. 103-111 - Yasir Siddiqi, Syed Arsalan Jawed, Naveed Ahmed:
PVT-tolerant Current Reference Generation using different PTAT currents. 112-118 - Jianfu Lin, Zheng Song, Meng Wei, Baoyong Chi:
A 6.6 mW 1.25-2.25 GHz low phase noise PLL frequency synthesizer based on wide tuning range Class-C VCO. 119-127 - Farzan Rezaei:
Linearity enhancement in the entire tuning range of CMOS OTA using a new tune compensated source degeneration technique. 128-135 - R. Ramesh:
Influence of gate and channel engineering on multigate MOSFETs-A review. 136-154 - Esmaeel Ranjbar, Mohammad Danaie:
Frequency compensation of three-stage operational amplifiers: Sensitivity and robustness analysis. 155-166 - Sherif M. Sharroush:
A voltage-controlled ring oscillator based on an FGMOS transistor. 167-186
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