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ORCIDNeil Weste
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2020 – today
- 2023
[c25]M. Surendra Raju, Aman Shrestha, Andrew Terry, Eyal Mendel, Jaric Thorning, Julius Baxter, Mohammed Mohammed, Neil Weste, Rama Kishore Chikkam, Yingbo Zhu:
Wi-Fi HaLow Internet of Things System on Chip (SoC) in Sub-1 GHz. ISCIT 2023: 1-5
2010 – 2019
- 2017
- [j6]Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran
:
Partial Dynamic Element Matching Technique for Digital-to-Analog Converters Used for Digital Harmonic-Cancelling Sine-Wave Synthesis. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(2): 296-309 (2017) - 2016
- [c24]Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran:
The effect of amplitude resolution and mismatch on a digital-to-analog converter used for digital harmonic-cancelling sine-wave synthesis. ISCAS 2016: 2018-2021 - 2015
- [c23]Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran:
Design of a digital harmonic-cancelling sine-wave synthesizer with 100 MHz output frequency, 43.5 dB SFDR, and 2.26 mW power. ISCAS 2015: 3052-3055 - 2014
- [c22]Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran:
A simple digital architecture for a harmonic-cancelling sine-wave synthesizer. ISCAS 2014: 2113-2116
2000 – 2009
- 2007
- [j5]Ivan Siu-Chuang Lu, Neil Weste, Sri Parameswaran:
A Power-Efficient 5.6-GHz Process-Compensated CMOS Frequency Divider. IEEE Trans. Circuits Syst. II Express Briefs 54-II(4): 323-327 (2007) - 2006
- [c21]Ivan Siu-Chuang Lu, Neil Weste, Sri Parameswaran:
ADC Precision Requirement for Digital Ultra-Wideband Receivers with Sublinear Front-Ends: A Power and Performance Perspective. VLSI Design 2006: 575-580 - 2005
- [c20]Ivan Siu-Chuang Lu, Neil Weste, Sri Parameswaran:
The effect of receiver front-end non-linearity on DS-UWB systems operating in the 3 to 4 GHz band. WCNC 2005: 776-781 - 2002
- [c19]Jeffrey Harrison, Neil Weste:
A limitation on active filter dynamic range. ISCAS (1) 2002: 537-540 - 2001
- [c18]Jeffrey Harrison, Neil Weste:
Energy storage and Gramians of ladder filter realisations. ISCAS (1) 2001: 29-32 - 2000
- [c17]David J. Skellern, Alex C. K. Lam, Neil Weste:
Issues in high-speed WLANs. ICASSP 2000: 3698-3701 - [c16]Jeffrey Harrison, Neil Weste:
Analytic limitations on sigma-delta modulator performance. ISCAS 2000: 746-749
1990 – 1999
- 1999
- [c15]Neil Weste:
Who Put the Sugar in Sydney Harbor?. ARVLSI 1999: 358- - [c14]Jeffrey Harrison, Neil Weste:
A wideband quadrature LO generator in digital CMOS. CICC 1999: 657-659 - 1998
- [j4]Neil Weste, David J. Skellern:
VLSI for OFDM. IEEE Commun. Mag. 36(10): 127-131 (1998) - [c13]Mark A. Bickerstaff, T. Arivoli, Philip J. Ryan, Neil Weste, David J. Skellern:
A Low Power 50MHz FFT Processor with Cyclic Extension and Shaping Filter. ASP-DAC 1998: 335-336 - [c12]Neil Weste, David J. Skellern, Terry Percival:
VLSI for Multimedia U-NII WLANs. ASP-DAC 1998: 585-587 - [c11]T. Arivoli, Mark Bickerstaff, Philip J. Ryan, Tom McDermott, Neil Weste, David J. Skellern, Terence M. Percival:
A single chip DMT modem for high-speed WLANS. CICC 1998: 9-11 - [c10]Neil Weste, David J. Skellern, Terry Percival:
Invited Paper: Broadband U-NII Wireless Data. VLSI Design 1998: 72-77 - 1997
- [j3]David J. Skellern, L. H. Charles Lee, Tom McDermott, Neil Weste, John Dalton, Jeffrey Graham, Tan F. Wong, Andrew Myles, Terence M. Percival, Philip J. Ryan:
A high-speed wireless LAN. IEEE Micro 17(1): 40-47 (1997) - [c9]Tom McDermott, Philip J. Ryan, Mark Shand, David J. Skellern, Terry Percival, Neil Weste:
A wireless LAN demodulator in a Pamette: design and experience. FCCM 1997: 40-46 - 1994
- [c8]Neil Weste:
OK, If These CAD Tools Are So Great, Why Isn't My Chip Design On Schedule?. ICCD 1994: 2-8
1980 – 1989
- 1983
- [j2]Neil Weste, David J. Burr, Bryan D. Ackland:
Dynamic Time Warp Pattern Matching Using an Integrated Multiprocessing Array. IEEE Trans. Computers 32(8): 731-744 (1983) - [c7]Jonathan B. Rosenberg, David G. Boyer, John A. Dallen, Stephen W. Daniel, Charles J. Poirier, John Poulton, C. Durward Rogers, Neil Weste:
A vertically integrated VLSI design environment. DAC 1983: 31-38 - 1981
- [j1]Bryan D. Ackland, Neil Weste:
The Edge Flag Algorithm - A Fill Method for Raster Scan Displays. IEEE Trans. Computers 30(1): 41-48 (1981) - [c6]Neil Weste:
Virtual grid symbolic layout. DAC 1981: 225-233 - [c5]David J. Burr, Bryan D. Ackland, Neil Weste:
A high speed array computer for dynamic time warping. ICASSP 1981: 471-474 - [c4]Bryan D. Ackland, Neil Weste, David J. Burr:
An Integrated Multiprocessing Array for Time Warp Pattern Matching. ISCA 1981: 197-216 - 1980
- [c3]Neil Weste, Bryan D. Ackland:
An IC design station needs a high performance color graphic display. DAC 1980: 285-291 - [c2]Bryan D. Ackland, Neil Weste:
Real time animation playback on a frame store display system. SIGGRAPH 1980: 182-188
1970 – 1979
- 1978
- [c1]Neil Weste:
A color graphics system for I.C. mask design and analysis. DAC 1978: 199-205
Coauthor Index
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