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1-V 100-MHz embedded SRAM techniques for battery ...

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由 N Shibata 著作2000被引用 25 次 — This paper presents the embedded SRAM techniques for high-speed low-power MTCMOS/SIMOX application-specified integrated circuits (ASICs) that are operated with ...

1-V 100-MHz embedded SRAM techniques for battery- ...

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由 N Shibata 著作2000被引用 25 次 — A threshold-voltage set for MTCMOS/SIMOX ASICs is listed in Table I. High s are decided within the limit of standby power (2 W per 100 K-gates), while low s are.

A 1-V, 10-MHz, 3.5-mW, 1-Mb MTCMOS SRAM

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This paper presents a high-speed and low-power SRAM for portable equipment, which is operated by a single battery cell of around 1 V, ...

A High-Speed Low-Power Multi-VDD CMOS/SIMOX SRAM ...

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A 0.5-V 25-MHz 1-mW 256-kb MTCMOS/SOI SRAM for solar-power-operated ... 1-V 100-MHz embedded SRAM techniques for battery-operated MTCMOS/SIMOX ASICs.

IEEE Journal of Solid-State Circuits

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1-V 100-MHz embedded SRAM techniques for battery-operated MTCMOS/SIMOX ASICs ... A step-down boosted-wordline scheme for 1-V battery-operated fast SRAM's.

Nobutaro Shibata

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2024年4月25日 — 1-V 100-MHz embedded SRAM techniques for battery-operated MTCMOS/SIMOX ASICs. IEEE J. Solid State Circuits 35(10): 1396-1407 (2000). [+][–] ...

Current-sensed SRAM techniques for megabit-class integration

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1-V 100-MHz embedded SRAM techniques for battery-operated MTCMOS/SIMOX ASICs. Article. Nov 2000. Nobutaro Shibata · Hiroki Morimura · Mitsuru Harada.

具有嵌入式静态随机存取存储器的集成电路及其工艺方法

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Memory system with RAM array and redundant RAM memory cells having a ... 2000 1-V 100-MHz embedded SRAM techniques for battery-operated MTCMOS/SIMOX ASICs.

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1-V 100 MHz embedded SRAM techniques for battery-operated. MTCMOS/SIMOX ASICs[J]. IEEE Jounal of Solid-State Circuits, 2000, 35(10): 1396-1407. [3]. [4]. [5].