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AbstractAbstract
[en] We are replacing the computers which support the CAMAC crates in the Fermilab accelerator control system. We want a significant performance increase, but we still want to be able to service scores of different varieties of CAMAC cards in a manner essentially transparent to console applications software. Our new architecture is based on symmetric multiprocessing. Several processors on the same bus, each running identical software, work simultaneously at satisfying different pieces of a console's request for data. We dynamically adjust the load between the processors. We can obtain more processing power by simply plugging in more processor cards and rebooting. We describe in this paper what we believe to be the interesting architectural features of the new front-end computers. We also note how we use some of the advanced features of the MultibusTM II bus and the Intel 80386 processor design to achieve reliability and expandability of both hardware and software. (orig.)
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Source
International conference on accelerator and large experimental physics control systems (ICALEPCS); Vancouver (Canada); 30 Oct - 3 Nov 1989
Record Type
Journal Article
Literature Type
Conference
Journal
Nuclear Instruments and Methods in Physics Research, Section A; ISSN 0168-9002; ; CODEN NIMAE; v. 293(1/2); p. 87-92
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