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[en] This paper presents a study of the effects of ionizing radiation on devices belonging to a 0.18 μm CMOS process, in view of applications to the design of front-end integrated circuits for detectors in high energy physics experiments. Static, signal and noise performances of devices with various gate dimensions were monitored before and after exposure to γ-rays from a ⁶⁰Co source up to a 300 kGy(Si) total dose

[en] This paper discusses the criteria that underlie the design of front-end systems for pixel sensors of different types in a highly diversified fields of application. In the pixel front-end systems, low level analog signals coexist with digital activities and the design must comply with severe limitations in the area and in the power allotted to the single pixel cell. Noise and radiation hardness issues are of utmost importance in several applications. Some ways to arrive at a design which suits specific application requirements are discussed and the impact of the most advanced monolithic processes is evaluated

[en] Deep submicron CMOS technologies are presently very attractive for front-end electronics design, because of their features in terms of low power consumption, high integration density and radiation tolerance. A full understanding of the noise parameters of the devices belonging to these technologies is needed to confirm that they can be used to implement low-noise analog blocks. This paper describes a noise test system, which was purposely developed to measure the noise voltage spectrum of CMOS devices in a frequency range extending up to 100 MHz. As an application example, the results of the experimental characterization of the noise properties of a 0.35 μm CMOS process are presented

[en] A fluorescence detector, consisting in a PhotoMultiplier Tube (PMT) pixel camera, will be used in the AUGER experiment to study cosmic-ray sources with energies exceeding 10¹⁸ eV. The front-end electronics transmits the PMT signals to the ADCs, retaining the timing and amplitude information carried by signals which span a wide (15-16 bits) dynamic range. The analog processing channel consists of a low-noise linear section, including an antialiasing filter, followed by a circuit of original conception, performing a high-accuracy bilinear compression of the signal dynamic range. This allows operation with a 12-bit ADC. Quantization errors can be minimized by correctly choosing the compression parameters. The paper presents the concepts the compressor is based upon, and the experimental behavior of a prototype version

[en] This paper presents the experimental results relevant to JFET charge preamplifiers fabricated in a detector-compatible technology. This fabrication process, developed at the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy, is being tuned with the aim of integrating a multichannel mixed analog-digital circuit together with semiconductor detectors in a high-resistivity substrate. Possible applications are in the field of medical and industrial imaging, in space and high energy physics experiments. An all-NJFET charge sensitive amplifier, which can use either a resistive or a nonresistive reset in the feedback network, has been tested. The two configurations have been studied, paying particular attention to noise performances, in view of the design of the complete readout channel

[en] This paper is devoted to studying the effects of γ radiation on the electrical parameters of complementary bipolar junction transistors, part of an SOI (silicon on insulator) BiCMOS process, in view of the design of fast, rad-hard analog blocks. A survey of the total ionizing dose response has been carried out paying particular attention to its dependence on the layout and process choices. The final integrated doses are compatible with operation in the space environment and in high-energy physics experiments involving moderately high-radiation levels. The issue of enhanced low-dose rate sensitivity (ELDRS) has been addressed by a preliminary characterization of transistors exposed to ⁶⁰Co sources with different activities

[en] During the past 15 years, the CMOS technologies have provided the most widely followed approach to signal processing with microstrip detectors. In more recent times, CMOS front-end systems have been developed to acquire and process signals from pixel detectors. During the past few years, the favor toward CMOS processes in their applications in the broad area of detector signal processing has been enhanced by the technological advancement known as device scaling and by two aspects connected to it. One is the shrinking in channel length L into the deep submicron region. The second one is the related reduction in the gate-oxide thickness t_ox to a few nm. The reduction in t_ox has, as a consequence of primary importance, a decreased 1/f-noise contribution to the equivalent noise charge (ENC). The thinner gate-oxide and the shrinking in gate length, in some regions of operations, concur to increase the transconductance of the device, which results in a smaller ENC contribution from channel thermal noise. The goal of the present paper is to address the question of whether or not the most advanced CMOS processes may meet the requirements set by high resolution, high dynamic range applications like the energy-dispersive photon analysis with solid-state detectors of comparatively large capacitance

[en] This paper presents a study of the noise behavior of deep submicron CMOS transistors, in view of applications to analog front-end systems for high granularity detectors. The white component of the noise voltage spectrum, which is most important for fast signal processing, and the 1/f noise contribution are investigated to find low-noise design criteria concerning the choice of the polarity and of the channel length of the preamplifier input device in low-power operating conditions. This analysis is supported by experimental data from noise measurements on CMOS devices belonging to a 0.35 μm process

[en] A novel, segmented, multi-gap, pressurized gas ionization chamber is being developed for optimization of the luminosity of the LHC. The ionization chambers are to be installed in the front quadrupole and zero degree neutral particle absorbers in the high luminosity IRs and sample the energy deposited near the maxima of the hadronic/electromagnetic showers in these absorbers. The ionization chambers are instrumented with low noise, fast, pulse shaping electronics to be capable of resolving individual bunch crossings at 40 MHz. In this paper we report the initial results of our second test of this instrumentation in an SPS external proton beam. Single 300 GeV protons are used to simulate the hadronic/electromagnetic shower produced by the forward collision products from the interaction regions of the LHC. The capability of instrumentations to measure the luminosity of individual bunches in a 40 MHz bunch train is demonstrated