[en] Two inhibitors of replicative deoxyribonucleic acid (DNA) synthesis, nalidixic acid (NAL) and 6-(p-hydroxyphenylazo)-uracil (HPUra), showed different effects on genetic recombination and DNA repair in Bacillus subtilis. Previous work (Pedrini et al., 1972) showed that NAL does not interfere with the transformation process of B. subtilis. The results reported in this work demonstrated that the drug was also without effect on the transfection SPP1 or SPO-1 phage DNA (a process that requires a recombination event). The drug was also ineffective on the host cell reactivation of ultraviolet-irradiated SPP1 phage, as well as on transfection with ultraviolet-irradiated DNA of the same phage. HPUra instead markedly reduced the transformation process, as well as transfection, by SPO-1 DNA, but it did not affect the host cell reactivation of SPO-1 phage. In conclusion, whereas the NAL target seems to be specific for replicative DNA synthesis, the HPUra target (i.e., the DNA polymerase III of B. subtilis) seems to be involved also in recombination, but not in the excision repair process. The mutations conferring NAL and HPUra resistance used in this work were mapped by PBS-1 transduction

[en] The High Luminosity upgrade of the LHC (HL-LHC) at CERN will provide unprecedented instantaneous luminosity of ∼5×1034 /cm2 /s, leading to an average of 150-200 simultaneous collisions. This high instantaneous luminosity scenario presents a significant challenge for the detectors. The barrel region of the CMS electromagnetic calorimeter (ECAL) will be preserved but will be operated at a lower temperature and with a completely new readout and trigger electronics. A dual gain trans-impedance amplifier and an ASIC providing two 160 MHz ADC channels, gain selection, and data compression will be used in the new readout electronics. The trigger decision will be moved off-detector and performed by powerful and flexible FPGA processors, allowing for more sophisticated trigger algorithms to be applied. The upgraded ECAL will be capable of high-precision energy measurements throughout HL-LHC and will greatly improve the time resolution for photons and electrons above 10 GeV. The performance obtained with the new electronics has been tested at CERN under an electron beam with a matrix of ECAL crystals equipped with APDs.

No abstract available

[en] In large fusion experiments, such as tokamak devices, there are common trends for slow control systems. Because of complexity of the plants, several tokamaks adopt the so-called 'standard model' (SM) based on a three levels hierarchical control: (i) high level control (HLC) - the supervisor; (ii) medium level control (MLC) - I/O field equipments interface and concentration units and (iii) low level control (LLC) - the programmable logic controllers (PLC). FTU control system was designed with SM concepts and, in its 15 years life cycle, it underwent several developments. The latest evolution was mandatory, due to the obsolescence of the MLC CPUs, based on VME/Motorola 68030 with OS9 operating system. Therefore, we had to look for cost-effective solutions and we chose a CompactPCI-Intel x86 platform with Linux operating system. A software porting has been done taking into account the differences between OS9 and Linux operating system in terms of inter/network processes communications and I/O multi-ports serial driver. This paper describes the hardware/software architecture of the new MLC system emphasising the reliability and the low costs of the open source solutions. Moreover, the huge amount of software packages available in open source environment will assure a less painful maintenance, and will open the way to further improvements of the system itself

[en] The Silicon Drift Detectors (SDDs) provide, through the measurement of the drift time of the charge deposited by the particle which crosses the detector, information on the impact point and on the energy deposition. The foreseen readout scheme is based on a single chip implementation of an integrated circuit that includes low-noise amplification, fast analog storage and analog to digital conversion, thus avoiding the problems related to the analog signal transmission. A multi-event buffer that reduces the transmission bandwidth and a data compression/zero suppression unit complete the architecture. In this paper the system components design is described, together with the results of the first prototypes

[en] The High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with a 13 bits resolution. Therefore, a high-speed, high-resolution ADC is required. Moreover, each readout channel will produce 2.08 Gb/s, thus requiring a fast data transmission circuitry. A new readout architecture, based on two 12 bit, 160 MS/s ADCs, lossless data compression algorithms and fast serial links have been developed for the ECAL upgrade. These functions will be integrated in a single ASIC which is currently under design in a commercial CMOS 65 nm technology using radiation damage mitigation techniques.

[en] We describe an algorithm for the zero suppression and data compression for the Silicon Drift Detectors (SDD) in the ALICE experiment. The algorithm operates on 10-bit linear data streams from the SDDs by applying a 10 bit to 8-bit non-linear compression followed by a data reduction based on a two-threshold discrimination and a two-dimensional analysis along both the drift time and the anodes. The proposed scheme allows for a better understanding of the neighborhoods of the SDD signal clusters, thus improving their reconstructability, and also provides a statistical monitoring of the background characteristics for each SDD anode. The entire algorithm is purely combinatorial and thus can be executed in pipeline, without additional clock cycles, during the SDD readout. The hardware coding together with the methods for the expansion to the original 10-bit values in the offline analysis and for the background monitoring are presented

[en] The front-end system of the Silicon Drift Detectors (SDDs) of the ALICE experiment is made of two ASICs. The first chip performs the preamplification, temporary analogue storage and analogue-to-digital conversion of the detector signals. The second chip is a digital buffer that allows for a significant reduction of the connections from the front-end module to the outside world. In this paper, the architecture of the system is described and the results achieved on a first prototype are presented

[en] The Micro Vertex Detector (MVD) is the innermost one of the Panda experiment, sitting around the beam pipe. The sensors are arranged in a barrel section with two pixel and two strip layers, and 6 forward disks with mixed pixel and microstrip sensors. For the pixel detector part, a hybrid solution with thinned epitaxial sensors was chosen. The main requirements for the readout include: a pixel size of 100·100 μm2, an input charge measurement with 12 b that implies an amplitude resolution of 1 part out of 4096, a working frequency of 155.5MHz, and a triggerless acquisition. The readout of the pixel detector is based on a front end chip, named Topix, that is under development. The Asic will provide the time position with a resolution of 6.43 ns and a charge measurement with a Time Over Threshold (TOT) technique; it features a matrix of 116 · 110 pixel cell channels and 311 Mb/s serializers as output ports. A 130nm Cmos technology has been used to reduce the circuit size and to provide tolerance for the total dose, besides techniques against single event upset have been implemented. A Topix prototype with the full cell has been completely tested for radiation damage before and after irradiation, and a new release has been submitted to build an hybrid assembly. The stringent requirements in terms of space for the MVD lead to an architecture based on optical links. The GigaBit Transceiver (GBT) from CERN has been chosen as the baseline solution for the interface to the data acquisition. Low mass cables based on aluminium on polyimide are under development for the interconnections.

[en] In this paper, we report on the experiment carried out at the Frascati Tokamak Upgrade (FTU) on the porting of the plasma control system (PCS) from a LynxOS architecture to an open source Linux real-time architecture. The old LynxOS system was implemented on a VME/PPC604r embedded controller guaranteeing successful plasma position, density and current control. The new RTAI-Linux operating system has shown to easily adapt to the VME hardware via a VME/INTELx86 embedded controller. The advantages of the new solution versus the old one are not limited to the reduced cost of the new architecture (based on the open-source characteristic of the RTAI architecture) but also enhanced by the response time of the real-time system which, also through an optimization of the real-time code, has been reduced from 150 μs (LynxOS) to 70 μs (RTAI). The new real-time operating system is also shown to be suitable for new extended control activities, whose implementation is also possible based on the reduced duty cycle duration, which leaves space for the real-time implementation of nonlinear control laws. We report here on recent experiments related to the optimization of the coupling between additional radiofrequency power and plasma