[en] The growing demand for wireless multimedia applications (smartphones, tablets, digital cameras) requires the development of devices combining both high speed performances and low power consumption. A recent technological breakthrough making a good compromise between these two antagonist conditions has been proposed: the 28-14nm CMOS transistor generations based on a fully-depleted Silicon-on-Insulator (FD-SOI) performed on a thin Si film of 5-6nm. In this paper, we propose to review the TEM characterization challenges that are essential for the development of extremely power-efficient System on Chip (SoC)

[en] In this paper we present the different imaging based techniques used in the semiconductor industry to support both manufacturing and R and D platforms at STMicroelectronics. Focus is on fully processed devices characterization from large structure (3DI, Imager sensors) to advanced MOS technologies (28-20 nm). Classical SEM and TEM (mainly EFTEM) based techniques are now commonly used to characterize each step of the semiconductor devices' process flow in terms of morphology and chemical analysis. However to address specific issues, dedicated imaging techniques are currently being investigated. With the 'High-k Metal Gate' stack involved in the more advanced MOS devices (28-20 nm), new challenges occur and therefore advanced characterization is mandatory. Some relevant examples are pointed out through (STEM) EELS and EDX experiments. Analysis of stressors mainly used to improve carrier mobility in next generation devices, is also presented with different approaches (NBD, CBED and Dark-field holography). Advanced STEM and AFM based techniques applied to characterize dopants and junction in MOS devices and also in more relaxed structure such as imager sensors is discussed too. Concerning back-end (interconnects) and 3D integration (3DI) issues, focus is on nano-characterization of defects by classical techniques (EFTEM, STEM EELS-EDX) and with dedicated ones still in development. To illustrate this topic some 3D FD3/SEM and E-beam tomography experiments are presented. Examples of microstructure and texture determination in poly-crystalline materials such as copper line by coupling SEM/EBSD and TEM techniques are also shown.

[en] In this paper we evaluate sensitivity limits and applications of scanning transmission electron microscopy (STEM) energy-dispersive X-ray (EDX) spectroscopy technique for the mapping of arsenic dopant distribution in nanometer range silicon devices. First we show that lamella radiation damages, generated by the intense focused electron probe at 200 keV, are significantly reduced at 120 keV. This allows to use high electron doses and therefore to improve the EDX sensitivity. The analysis of 45nm nMOS transistor clearly shows the n doped areas and local segregation in gate and spacers.

[en] There is a need to measure the dopant potentials and strain fields in semiconductor materials with nm-scale resolution. Here we show that off-axis electron holography is a powerful technique that can be used to measure the fields present in a high-k metal gate 28-nm node nMOS device with a contact etch stop liner stressor. Off-axis electron holography has been used to map the positions of the active dopants with a spatial resolution of 1 nm. The experimental results have been compared to electron energy loss spectroscopy maps. Finally, dark field electron holography has also been used to provide strain maps and the experimental results have been verified using nanobeam electron diffraction.