[en] Arsenic ions were implanted in a strained-Si/SiGe/Si hetero-structure to fabricate an n⁺ layer in the substrate. The disordering of the substrate caused by ion implantation and the reordering during post-implant rapid thermal annealing (RTA) were analyzed by Rutherford backscattering and channeling (RBS) measurements. It was shown that the major part of implantation-induced defects was eliminated during RTA for 10 s above 900 deg. C. Electrical and atomic-concentration profiles for As-implanted layers were examined by differential Hall-effect and secondary ion mass spectrometric (SIMS) measurements, respectively. A 25-nm thick, n⁺ layer with carrier concentrations in a range of 5.2x10¹⁹ to 1.7x10²⁰ cm^-3 was formed in the strained Si layer after RTA at 1000 deg. C without the deterioration in the abruptness of the Si/SiGe interface. It was also revealed that the electrons in the strained Si layer had a higher mobility than the electrons in bulk Si by a factor of around 1.2 in a carrier concentration range of mid-10¹⁹ to -10²⁰ cm^-3

[en] In this paper the effects of plasma- enhancement on MOCVD for growing superconducting YBa₂Cu₃O_x thin films is studied. It is revealed that plasma-enhancement accelerates crystallization of YBa₂Cu₃O_x so that growth temperatures of superconducting films can be decreased by about 150 degrees C. Thin films grown by plasma-enhanced MOCVD at 515 degrees C and 580 degrees C indicate zero-resistivity temperatures of 60K and 84K, respectively. Critical current density in the film grown by plasma-enhanced MOCVD at 580 degrees C is 10⁵ A/cm² at 77K. Infrared absorption spectroscopy and ultraviolet and visible emission spectroscopy clarify that plasma excite the metalorganic compounds and that this excitation promotes oxidation of metalorganic compounds and crystallization of YBa₂Cu₃O_x

[en] Thin YBa₂Cu₃O_7-x films were grown by thermal and plasma enhanced MOCVD, and the effects of growth temperature on the film properties were studied. The crystallinity of the films deteriorated with growth temperature, so superconductivity decreased with growth temperature. Thin films grown by thermal MOCVD at 600 degrees C, 650 degrees C, 700 degrees C and 750 degrees C had zero-resistivity at 10 K, 71 K, 83 K and 84 K, respectively. The growth temperature for superconducting films is decreased by plasma enhancement. Thin films grown by plasma enhanced MOCVD at 515 degrees C and 580 degrees C had zero-resistivity at 60 K and 85 K. The critical current density of films grown by plasma enhanced MOCVD at 580 degrees C was 10⁵ A/cm² at 77 K

[en] This paper reports on Sr_1- x Nd_xCuO_y thin films grown on SrTiO₃ substrates by rf-magnetron sputtering and pulsed-laser deposition. The sputter-deposited film with x=0 has an infinite-layer structure whose lattice constants are: a=0.390 nm and c=0.347 nm. When x is larger than 0.1, the films contain a phase of the Sr₁₄Cu₂₄O₄₁ structure. The laser-deposited films of Sr_1- x Nd_xCuO_y with x ≥ 0.075 were single phase of the infinite-layer structure. The lattice parameter c decreased and the lattice parameter a increased, as the Nd content, x, increased. The films with x=0.10 and 0.125 exhibited superconducting onset temperatures around 26 K. Weak Meissner signals were observed for these films at temperatures below 30 K

[en] Bipolar resistive switching characteristics of CeO_x layer on Si-based bottom electrodes (BE) are presented. Owing to the formation and the presence of a thin SiO₂ interfacial layer (SiO₂-IL) between the CeO_x layer and BE, the set process is triggered by a local breakdown at the thin SiO₂-IL due to large differences in dielectric constants. Reset process, on the other hand, is obtained by local anodic oxidation to the breakdown spots by the high oxygen ion conductivity of the CeO_x layer. High insulating properties of SiO₂-IL enables obtaining a resistance ratio of over 10⁵ at high-resistive-state to low-resistive-state. A model to explain the resistance ratio has been proposed using initial trap density of SiO₂-IL. Moreover, forming-free feature can be achieved with NiSi₂ BE. (paper)

[en] Radio-frequency (rf) performances of a sub-100 nm MOSFET with two different gate dielectrics have been characterized. A 59 nm gate-length field-effect transistor (FET) with a SiON gate dielectric exhibited a cut-off frequency (f_T) and a maximum oscillation frequency (f_max) of 178 and 127 GHz, respectively. However, an FET with a HfSiON gate dielectric exhibited 148 and 122 GHz, respectively. The reduction in f_T has been found to be attributed to the degradation in the mobility and not to the dielectric relaxation of the HfSiON film. It has been confirmed that the high dielectric constant of HfSiON films can be utilized for future rf CMOS circuits at least up to 40 GHz

[en] The feasibility of employing yttrium–scandium oxide (YScO_x) as high-k gate dielectrics for germanium-metal–oxide–semiconductor (MOS) devices has been investigated. The composition and chemical structures of the film were studied using x-ray photoelectron spectroscopy (XPS). Conduction and valence band discontinuities at YScO_x/Ge (1 0 0) interfaces were also determined by measuring the O 1s photoelectron energy loss and valence band spectra. Indeed, high-k (YScO_x)/Ge MOS characteristics, exhibiting fairly good electrical characteristics, especially low leakage current density and low density of interface states, have been achieved due to the formation of stable Y-Sc-germanate at the interface. The effects of various scandium oxide (ScO) concentrations in YScO_x on the electrical characteristics are also reported. It has been demonstrated that higher ScO concentration in YScO_x may cause V_fb to shift to its even lower positive value even if considering hysteresis while it causes degradation in interfacial properties. Besides, the effects of several annealing treatments have been investigated in order to optimize the process conditions. This work suggests that ScO concentration up to 50% in YScO_x along with post-metallization annealing treatment at 500 °C will be the key to ensure reasonable electrical performance of Ge MOS devices

[en] Interface properties of La-silicate gate dielectrics on Si substrates with W or nano-sized grain W₂C gate electrodes have been investigated. A low interface state density of 2.5 × 10¹¹ cm⁻²/eV has been achieved with W₂C gate electrodes, which is one third of those with W gate electrode. An interface roughness of 0.33 nm with spatial frequency comparable to the grain size of W gate electrode has been observed. Besides, an atomically flat interface of 0.12 nm has been obtained with W₂C gate electrode. The origin of flat interface may be attributed to the elimination of inhomogeneous stress by grains in metal electrode

[en] The effect of remote Coulomb scattering on electron mobility in W/La₂O₃/Si gate stacked metal-oxide-semiconductor field-effect transistors (MOSFETs) was studied. Experimental results show that scattering caused by the Coulomb charges located near the W/La₂O₃ interface becomes a dominant factor for the mobility of MOSFETs with an equivalent oxide thickness (EOT) of 1 nm or less. (paper)

[en] The physical and electrical properties of Ni silicides, reactively formed by a thin Ni layer of 3 nm, have been investigated. The existence of NiSi₂ phase has been confirmed at low temperature annealing by x-ray photoelectron spectroscopy. The silicides have shown flat surfaces up to an annealing temperature of 800 °C and a stable sheet resistance can be achieved. The Schottky barrier heights extracted from diode characteristics have shown stable values against annealing temperature owing to the stability of the film with an ideality factor nearly to unit.