Quais são os passos para implementar um sistema de controle digital com FPGA?

This is missing the most critical step: what are the requirements for the digital implementation. If one is doing DSP, one has to convert from realtime&floating-point to discrete-time&integer (or fixed fraction), and make sure that works before converting into HW. In all cases, there's timing requirements that need to be clearly specified before implementation can start. I'd recommend writing up a test-plan with corner-cases and error-conditions: what are illegal states? Do you detect them or not? If so, how do you report them & how do you do error-recovery? If you don't do these things, you can create a system that locks up, has intermittent random behavior, outputs illegal states, etc.

What are the requirements of my design? Is a FPGA necessary? You need to consider speed and factors as execution and components required to satisfy these requirements. That will decide what platform to use. E.g. Altera, Xilinx, etc… and the capabilities of the boards linked with the chosen platform.

These questions are inadequate as complete steps for designing a controller with FPGA as they don’t consider one of the most important pieces of such a system: the analog front-end for the sampling plus quantization part at the input and digital to continuous conversion at the output. The sampling rate at the input & output, the bandwidth of the AA filters, quantization levels should be determined to meet the requirements of the control loop well ahead of implementation.

While most of the steps are correct often time Step 0 that’s forgotten is - Gather clear requirements, either from a Functional System specifications or from a predefined functionality. These can also be gathered from other modules or controllers or discrete interfaces it’s interacting with. Why this is important? You need to build a design that is essential for system function and not built on the fly. Having clear requirements make for clear design plan as well as verification plan, which helps in validating original ideas as intended.

During simulation, employ SystemVerilog Assertions to validate the conformity of the IO and internal bus interfaces with the design and internal communication requirements. Constrained-random tests are imperative for comprehensive verification. In the case of intricate designs, it is advisable to utilize UVM (Universal Verification Methodology).

Do test-driven design (TDD): write the test-cases, make sure they make sense - and expect to uncover issues w/ requirements/spec. They always happen, and you do TDD to catch them when it is as cheap as possible to recover. Then start coding to implement each one. Turn on code-coverage if you have it, and you should get to 100% before you add another test. That way, whatever you have done you know is *done* and fully tested. This is an Agile best-practice. If you have functional coverage (FC), use it as well, and plan on what FC will be hit by each test, and which won't, so you don't miss anything.

Simulation of the system should be end-to-end where all the analog components and noise modeled with the appropriate accuracy. The digital portion of the system can be implemented in either floating point or fixed-point numerical representation and accurate modeling will help decide which is better. FP representation is easier to implement and it might be useful in early prototyping and fixed-point conversion can be done later to reduce cost and power

The HDL is a hardware description language and that is literally how it works; you describe hardware. It looks like software but is actually describing hardware. For example, an if-then-else is a conditional jump in software. In hardware if-then-else describes a priority encoder. Thus you have to understand boolean algebra. To write HDL is to understand the relationship between the synthesizable subset of the HDL and the basic building blocks of digital hardware: AND, OR, NOT and storage elements, so called flipflops.

Implementation of controller on fpga is one part, we need to put other glue logic like I2c, uart for real time debugging and some real time changing parameter can be controlled via uart or i2c. Next we need a feature to remote image upgrade with also need spi or jtag protocol. If application need processor we can also use fpga based soc with has programmable logic and programmable system.

The following are the steps I typically take: - Work with stakeholders to understand requirements. - Create “chip” level block diagram focusing the required control for the system and data flow through the system. - Create a verification plan, including module-level test benches, chip-level test bench and in-system tests. - Implement the design in HDL. - Verify design according to test plan.

The implementation of a digital control system with FPGAs can be done in several different ways. One can use HLS to convert a c/c++ model to Verilog or use a high level modeling tool like Matlab-simulink to generate the code and convert to RTL directly. In the end the he actual implementation has to be in a HDL language like Verilog or VHDL and this need to be pushed through the FPGA tool like Vivado from Xilinx or Quartus from Altera.

What type of hardware I am designing? Sometimes the type of power supply is so critical to make my design reliable and the cost of components will define the extent of operations and even the program itself.

While prototyping a digital control with actual hardware, the most important thing one has to realize is that all connections, cabling become part of the system under test. It’s possible and likely that such components will introduce noise, phase shift, and change frequency characteristics of the system and these impacts have to be realized and accounted for in the model and simulation.

One final thing to consider when designing a digital control system with FPGAs is to make well integrated analog front end AFE which interfaces with the actual controller very tightly so as not to interfere with it. If such an AFE board is available, it makes modeling challenge of the system much more tractable.