Electrical Modeling of Lithographic Imperfections

Tuck Boon Chan, Rani S. Ghaida, Puneet Gupta. Electrical Modeling of Lithographic Imperfections. In VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010. pages 423-428, IEEE, 2010. [doi]

Authors

Tuck Boon Chan

This author has not been identified. Look up 'Tuck Boon Chan' in Google

Rani S. Ghaida

This author has not been identified. Look up 'Rani S. Ghaida' in Google

Puneet Gupta

This author has not been identified. Look up 'Puneet Gupta' in Google
  翻译: