A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation

Francisco E. Rangel-Patino, Andres Viveros-Wacher, José Ernesto Rayas-Sánchez, Ismael Duron-Rosales, Edgar-Andrei Vega-Ochoa, Nagib Hakim, Enrique Lopez-Miralrio. A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation. IEEE Trans. Emerging Topics Comput., 8(2):453-463, 2020. [doi]

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