AMD's 5th Gen EPYC Turin CPU lineup featuring Zen 5 & Zen 5C cores with up to 160 cores has been leaked out by Yuuki_AnS.

AMD EPYC Turin "5th Gen" CPU Lineup Family Leak Shows Up To 96 Zen 5 & 160 Zen 5C Cores, Massive TDPs of Up To 500W

The preliminary specifications of AMD's next-gen EPYC Turin lineup which will be branded under the 5th Gen EPYC family have been revealed which includes at least 20 SKUs based on the Zen 5 & Zen 5C core architecture. These cores are codenamed Zen 5 "Nirvana" & Zen 5C "Prometheus" cores. The lineup has been designed to feature drop-in compatibility with the existing 4th Gen EPYC family on the SP5 (LGA 6096) socket and will feature support for faster DDR5 6000 MT/s memory too.

Starting with the specifications, we first have to state that there's no mention of which of these SKUs are based on the Zen 5 or Zen 5C architecture but we can make a good guess based on the existing lineup and what we know about the Turin family based on its expected core counts. The lineup was meant to feature up to 128 Zen 5 and 192 Zen 5C cores so starting with that let's take a look at the SKUs.

The top SKUs include the EPYC 9845 (160 Core / 320 Thread), 9825 (144 Core / 288 Thread), 9745 (128 Core / 256 Thread), 9655 (96 Core / 192 Thread), 9645 (96 Core / 192 Thread), and 9565 (72 Core / 144 Thread). All of these SKUs are 64 Core+ variants and feature more than 256 MB of L3 cache and TDPs ranging from 320/400 up to 500W. Following are the various CPU configurations that we should expect in the EPYC Turin family:

• 100-000001245 - 16 CCD + 1 IOD (128 Zen 5 Core / 256 Thread / 512 MB Cache)
• 100-000001341 - 12 CCD + 1 IOD (96 Zen 5 Cores / 192 Threads / 384 MB Cache)
• 100-000001247 - 8 CCD + 1 IOD (64 Zen 5 Cores / 128 Threads / 256 MB Cache)
• 100-000001342 - 8 CCD + 1 IOD (64 Zen 5 Cores / 128 Threads / 256 MB Cache)
• 100-000001249 - 2 CCD + 1 IOD (32 Zen 5C Cores / 64 Threads / 64 MB Cache)

Now since it isn't mentioned if these are Zen 5 or Zen 5C SKUs, the cache pools range from 256 MB and up to 384 MB. For the 96-core SKU, if it is based on the Zen 5 architecture, then it should carry an impressive 512 MB of l3 cache but if it's based on the Zen 5C architecture, then it should retain a 256 MB cache. Since it's very unlikely that there will be a Zen 5 offering above 128 cores, the 144-core and 160-core variants should stick with the Zen 5C architecture.

• EPYC Zen 5C: Up To 192 Cores, 384 MB L3 Cache (+50% More Cores / L3 Cache Versus Zen 4C)
• EPYC Zen 5: Up To 128 Cores, 512 MB L3 Cache (+33% More Cores / L3 Cache Versus Zen 4)

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The rest of the lineup is pretty much the standard 8, 16, 24, 32, 36, 48, 64 core affair with standard and Frequency-optimized offerings. The clock speeds range from as low as 2.0 GHz to up to 4 GHz (base) while the TDPs range from 155W/200W/210W/280W &300W+. According to a platform chart posted by Momomo_US, it looks like AMD's EPYC Turin will support up to DDR5-6000 MT/s memory DIMMs in up to 4 TB capacities on an 8 DIMM motherboard, offering up to 128 PCIe Gen5 lanes.

It is mentioned that the lineup leaked out is incomplete and the clock speeds are preliminary since it doesn't provide more info on the boost clocks but we can expect them as we get closer to launch.

The AMD EPYC Turin "5th Gen" family for servers is expected to debut later this year after the formal launch of Zen 5 & Zen 5C architectures for the desktop and client PC platforms such as Granite Ridge and Strix Point. The 5th Gen EPYC Turin family will be competing against Intel's Xeon Granite Rapids P-Core and Sierra Forest E-Core (288 Core) CPUs.

AMD 5th Gen EPYC Turin CPU Lineup "Preliminary" Specs: