Abdelrhman Marzoq’s Post

🚀 Exciting News! I've completed the GPIO Driver for the STM32F103 Cortex-M3 and uploaded it to my GitHub repository as part of a comprehensive project to develop drivers for this microcontroller. Check out the GPIO driver here: [https://lnkd.in/dCJG_3sw] 🔧 Features include: - Pin configuration (input, output, alternate function) - Pin state control (set, reset, toggle) - GPIO interrupt handling This achievement is a significant milestone in my advanced diploma program with Eng.Amgad Samir, where I am enhancing my expertise in embedded systems and microcontroller development. Stay tuned for more drivers on the way! #EmbeddedSystems #STM 🛠️📂🖥️

Excited to share my recent project where I developed a complete driver for the CS5532BS analog-to-digital converter (ADC) using the powerful PIC32MZ2064DAR MIPS microcontroller! 📟 The CS5532BS is a high-precision, low-noise ADC, ideal for applications requiring accurate signal measurement. Integrating it with the PIC32MZ2064DAR, known for its high performance and extensive peripheral options, provided a robust solution for precise data acquisition. 🔧 Tools: MPLAB X IDE and XC32 Compiler for development. Delight in using!🙂 #Microchip #FirmwareDevelopment  #EmbeddedSystems  #mips

🚀 Introducing PIC18F46K20 Controller Drivers v1.0! 🚀 I'm thrilled to announce the release of version 1.0 of our PIC18F46K20 Controller Drivers! 🎉 This project I have been working on for a while! 🔧 What's Included: MCAL (Microcontroller Abstraction Layer) Drivers: GPIO for simple and smooth I/O instructions Interrupts for responsive, event-driven programming. EEPROM for persistent data storage. ADC for converting analog signals to digital values. ECU (Electronic Control Unit) Drivers: 7-Segment Display, Button, DC Motor, Relay, Keypad, and LCD drivers. 📚 Explore the Documentation: Each driver comes with detailed documentation, usage examples, and implementation details. Dive into the respective directories to enhance your project development. 🆕 What's Next: The next versions will contain the remaining peripherals. This release marks the beginning of the journey. I'll continue to refine and expand the drivers expand! GitHub Repo: https://lnkd.in/dxjBSG7v #PIC18F46K20 #Microcontroller #Drivers #OpenSource #EmbeddedSystems #Coding #DeveloperCommunity #ReleaseAnnouncement #Version1.0

🚀 Stacks in ARMCortex-M(x) processors>> Our ex will be on Cortex-M4 processor - STM32f446 microcontroller (Nucleo board). ⚡ The processor uses a full descending stack. this means the stack pointer holds the address of the last stacked item in memory. ⭐ processor implements two stacks, the main stack (msp) and the process stack (psp). In Thread mode, the CONTROL register controls whether the processor uses the (msp) or the (psp). In Handler mode, the processor always uses the main stack. 📢 In Bit[1] of CONTROL register. • 0 = Main Stack Pointer (MSP). This is the reset value. • 1 = Process Stack Pointer (PSP). 📌 In our ex we take 1kbyte from stack from the end and divide it into two equal sections: 1️⃣ MSP section which is hold the address of (RAM_END) and it will take 512 byte, because in default initialization processor take the value of 1st address of flash region and put it into MSP. 2️⃣ PSP section which is hold the address of (RAM_END + 512) and it will take 512 byte too. then by default when the program is running the value in (SP) is the same value in (MSP) we need to link (SP) with (PSP) to do it, we must intialize (PSP) with any value once you do it you will can link it with (SP). **__asm volatile(".equ RAM_END, (0x20000000U + (128*1024)) "); // represents the preprocessor in assembly then we link (PSP) with (SP) by Putting 0x02 in CONTROL REG __asm volatile ("LDR R0, =#0x02"); __asm volatile ("MSR CONTROL, R0"); int func (multiply) >> proccessor is in thread mode and (PSP) Link with (SP), once func of generate interrupt executes the processor will be in handelr mode (MSP) will link with (SP). https://lnkd.in/dVUk3Kwh

🔍 Exciting Project Alert! 🔍 🌟 Hey everyone, I’m excited to share one of my interesting project: a Low-Memory Onboard Convolution Engine developed using Verilog on a Cyclone IV FPGA. 🌟 🔹 Efficient Convolution Design: Leveraging optimized hardware architecture and clever memory management techniques, my convolution engine efficiently processes image data in real time, without the need for extensive memory resources. 🔹 Strategic Memory Usage: By strategically buffering only three rows of the image frame, my solution minimizes memory usage while maintaining performance, making it a practical choice for resource-constrained environments. 🔹 Seamless Integration with OV7670 Camera Module: Seamlessly integrating with the OV7670 camera module, my convolution engine directly processes incoming image data, simplifying the image processing pipeline and reducing latency. 🔹 Versatile and Adaptable: Supporting configurable kernel sizes, my convolution engine adapts easily to various image processing tasks, offering versatility and flexibility in application. 🔹 Realistic Performance Expectations: While not the most groundbreaking project in image processing, my convolution engine offers practical and reliable performance suitable for a range of applications, from embedded systems to edge computing devices. 🔗 Check out the project on GitHub: https://lnkd.in/dpQEZZ8n 👨💻 Let’s connect and discuss how my project can add value to your image processing applications. I’m eager to share insights and explore potential collaborations! 👩💼 #ImageProcessing #FPGA #Verilog #EmbeddedSystems #GitHub #LinkedInNetworking

working on my custom OS . Its a hobby project mainly to learn OS concepts by practically doing in C currently implemented :- memory management and I/O devices in development :- GDT, paging, CPU scheduling https://lnkd.in/gEWGb5Gt

🔧 Progress Update: 𝐕𝐞𝐫𝐢𝐥𝐨𝐠 𝐌𝐢𝐧𝐢-𝐏𝐫𝐨𝐣𝐞𝐜𝐭𝐬 𝐑𝐞𝐩𝐨𝐬𝐢𝐭𝐨𝐫𝐲 Excited to share my latest work on implementing a series of mini projects in Verilog, ranging from foundational digital logic blocks to more complex designs: 🧩 Basic modules: Multiplexers Encoders & Decoders Adders Latches & Flip-Flops Registers & Counters 🚀 More complex modules: FIFO Memory swapper Delay detection debouncer PWM (Pulse Width Modulation) Sequence detectors ALU (Arithmetic Logic Unit) ...and much more! Each module underwent rigorous verification through detailed testbenches and simulations, leveraging QuestaSim to ensure both accuracy and performance. Looking forward to exploring more complex designs and continuing to deepen my understanding of hardware description languages! #Verilog #DigitalDesign #HDL #FPGA #EDA #HardwareSimulation #Questasim #Projects #Innovation

I installed new memory into my computer. But I don't know why using GPU, system suddenly shutdown without any error. It's good experience to analysis failure cause and create simple checker. I've never think new memory make shutdown symptom in this case. https://lnkd.in/gYR2mZ2e

I've did this project last semester in OS course, basically it's a CPU scheduler simulation that simulate scheduling methods in a CPU like FCFS, SJF, Priority, RR support preemptive & non-preemptive modes. #C++

I’m thrilled to share the culmination of my journey in ARM Architecture and STM interfacing, where I developed drivers for the STM32F103C8 and STM32F446 MCUs, leveraging the power of Cortex-M3 and Cortex-M4 processors. Using the bluepill (STM32F103C8T6) and Nucleo Board (STM32F446RE), I created a series of small projects to test these drivers, ensuring their reliability and performance in real-world scenarios. Whether you’re diving into embedded systems or looking to explore ARM processors, these drivers could be a valuable resource. Feel free to explore : https://lnkd.in/d33t86QY #EmbeddedSystems #ARM #STM32 #CortexM3 #CortexM4 #Microcontrollers #STM32F103C8 #STM32F446 #OpenSource