USB in Depth - xHCI Part 2

Following the last article, i'll continue to write about the xHCI of USB, if you don't read the last article, please click here and read if you want.

The last article i talked about the architecture and registers and this article will be about the operation.

Of course that i can't cover everthing in a small article, but explain some of the main options that you need to know to start.

Host Controller Initialization

When the system boots, host controller is enumerated, assigned a base register for the xHC register space and the system software sets the Frame Length Adjustment (FLADJ) register to a system-specific value.

Some tasks of the system software need to perform are:

• Initialize the system I/O memory maps, if supported
• After hardware reset, wait until the Controller Not Ready flag in the USBSTS is '0' before writing any xHC Operational or Runtime Register
• Program the Max Device Slots Enabled field in CONFIG register
• Program the Device Context Base Address Array Pointer (DCBAAP) register
• Define the Command Ring Dequeue Pointer
• Initialize Interrupts
• Write the USBCMD to turn the Host Controller ON.

At his point the host controller is up and running and the Root Hub ports will begin reporting device connects, etc, And the system software may begin enumerating devices.

Just remember that USB2.x devices require the port reset process to advance the port to the Enabled state.

USB Device Initialization

The USB Device initialization process is the same, whether the device attached is an HUB or any another Function.

After a Hardware Reset, HCRST, or command to the PLS = RxDetectState, all Root Hub ports shall be in Disconnected state and when a USB device is attached to a port that is in Disconnected state all the protocol process will start.

I will not go into details in this step, it's a long process that you need to be sure to follow all steps for correct operation, you can check the standard to get all steps.

Transfer Request Block (TRB)

I'll say that to start understand how everything get together you need to understand the TRB's, they will make the interface from what you know about USB transfers (Isoch,Interrupt, Control and Bulk) to the xHCI software and hardware controllers. Each of the USB transfers have one TRB related, the template is shown in the image below.

Each transfer will have your own parameters, status, control, etc fields, with this basic structure.

The TRB Ring make the management of the TRB's. The TRB Ring is a circular queque of TRB data structures and there is 3 basic types: Transfer, Event and Command.

Command Interface

The Software places commands on the Command Ring, through the Command Ring Control Register (CRCR), then rings the Host Controller Doorbell Register to notify the hardware. Some commands are:

• Enable/Disable Slot
• Configure/Reset/Stop Endpoint
• Reset Device
• Force Event/Header

Doorbells Registers

The doorbells are an array of 256 32-bit registers that reside in MMIO space and are indexed by device slot Id. Each Doorbell has an Endpoint associated to it.

Conclusion

The xHCI will manage all the USB transfers in the host, making the bridge between hardware and software.

With theses definitions in mind, i think you can go over the standard and understand better, as always that's no possible to cover all in theses small articles.

You can always leave a comment, can ask to cover any topic as few people already did it, this topic included. The next Topic will be PCIe.