Intel's Nehalem is a multi-threading monster
More cores, tons of threads, even wider instruction handling
Intel claims its upcoming Nehalem CPU architecture will deliver a major boost in multi-threading performance.
Speaking yesterday to hacks from across the globe, senior Intel suit Stephen Smith revealed a raft of new Nehalem architectural details. However, he conspicuously declined to make specific performance predictions.
Nehalem is the next step in Intel's much-touted "tick-tock" strategy that sees a new production process and major CPU architectural revision introduced in alternate years.
Late last year saw the launch of the first 45nm Penryn processors, essentially a die shrink of the 65nm Conroe family of 2006. Intel's schedule therefore demands that the Nehalem architecture rolls out on Intel's 45nm node before the end of '08.
More parallel processing
First up, Intel has boosted Nehalem's simultaneous micro-ops handling from 96 in Penryn to 128 per cycle. If that sounds like digital double-speak, the idea is an increase in instruction-level parallelism. That in turn means more work done per cycle and more number crunching grunt.
The wider micro-ops handling is also said to to help keep both instruction pipelines in each Nehalem core operating near peak efficiency. Lest you have forgotten, Nehalem sees the resurrection of HyperThreading. That's a feature last seen on Intel's defunct Pentium 4 processors. It enables a single core to crunch two software threads at the same time.
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Among other detail changes, Smith also said the Nehalem branch predictor had been improved, an enhancement that reduces the likelihood of processing cycles being wasted.
A question of cache
The other major disclosure was a break down of Nehalem's cache structure. All Nehalem chips will pack 64KB of L1 cache and 256KB of L2 cache. Those are supplemented by a large pool of shared L3 cache, in the case of the quad-core model, 8MB. It's an approach that closely mirrors that of AMD's troubled Phenom processor.
Intel has already revealed that Nehalem will be available in configurations from two to eight cores. Factor in the wider micro-ops handling and HyperThreading support and you have a chip with monstrous multi-threading throughput.
Nehalem's integrated triple-channel memory controller and on-die northbridge have likewise been subject of previous disclosure. Both are expected to increase the bandwidth available to the cores and, again, give a big boost to multi-threaded oomph.
Intel goes thread happy
All terribly impressive. However, we can't help thinking Intel has gone a bit thread happy. Today's quad-core processors already feel like overkill in terms of multi-threading, for average users at least. It's hard to imagine many PC owners benefiting anytime soon from a chip that can handle eight or even 16 threads.
These new details will no doubt have CPU architecture aficionados chatting deep into the night. However, the truth is that we still don't know just how much extra performance the Nehalem family will bring. With any luck, that's something we'll learn more about at the Shanghai instalment of IDF in a few week's time.
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