Technology moves fast. Sometimes, too fast. While the industry is still adapting to the inclusion of PCIe 4.0 in consumer products, and PCIe 5.0 is barely rolling out, PCIe 6.0 is already entering the fray. PCIe, sometimes referred to as “PCI Express,” stands for Peripheral Component Interconnect Express, founded in 1992 by the Peripheral Component Interconnect Special Interest Group (PCI-SIG). PCIe is the standard used by expansion cards such as sound cards, graphics cards, SSDs, and networking cards to transfer data within our devices.
Better PCIe standards translate directly to increased device performance, whether we’re talking about gaming consoles, advanced networking, or using tools to conduct scientific research. If we liken the various components in our devices to high-speed trains, and the data they need to carry to the passengers on board, PCIe would be the track. As trains become faster and more advanced, better tracks are needed. Where this metaphor breaks down is the sheer pace of change. Better devices are continuously being developed, creating demand for faster and more capable PCIe standards.
To put this into perspective, PCIe 2.0 offered a bit rate of 5 gigatransfers per second (GT/s) with a 20% encoding overhead, resulting in a delivered bandwidth of around 4 Gb/s. PCIe 3.0 and subsequent versions adopted more efficient encoding techniques, reducing the overhead to just 1.5%, which translated to significantly higher speeds. These standards were introduced in 2007 and 2010 respectively. PCIe 4.0, launched in 2017, achieved 16 GT/s, and PCIe 5.0, which debuted in 2019, doubled that to 32 GT/s.
Now, with the recent release of PCIe 6.0 in 2022, the standard has taken another leap, offering a staggering 64 GT/s. Specifically, a single-lane (x1) of PCIe 6.0 can achieve a bandwidth of 7.56 GB/s, and a 16-lane (x16) configuration can reach up to 121 GB/s. This immense bandwidth gain is crucial for high-performance applications, ensuring faster data transfers and reduced latency, which is vital for real-time operations and high-performance computing tasks like AI modeling. As we delve deeper into the impact of PCIe 6.0, it's essential to understand its significance, how it functions, and its overarching influence on the market.
Director of Product Line Management at VIAVI Solutions.
From PCIe 5.0 to PCIe 6.0: More than a number
PCIe 5.0 was primarily driven by server, compute, and GPU applications. However, the transition to PCIe 6.0 is set to be influenced by different application sets. One of the most notable advancements is the introduction of a specially designed Compute Express Link (CXL), beginning with CXL 3.0. CXL is an interconnect technology designed by a consortium of computing companies including Intel, Microsoft, Google, and others, which handles data access between the central processing unit of a device and its peripherals such as accelerators, memory buffers, and smart I/O (input/output) devices. While CXL had earlier specifications, it is 3.0 and subsequent versions that are expected to gain significant traction, because they will have been designed to align perfectly with PCIe 6.0.
The primary drivers for this new generation of PCIe and CXL are artificial intelligence (AI) and machine learning (ML) applications. These technologies, demand very low latency I/Os. Major players like NVIDIA, with their graphical processors used to drive machine learning, are at the forefront of this shift, but it is most certainly a sign of things to come.
How PCIe 6.0 will impact the market
First of all, the adoption of PCIe 6.0 will not be uniform across all sectors. For instance, the client market, which includes laptops and desktop CPUs, may continue to rely on PCIe 5.0 for the foreseeable future. PCIe 5.0 already provides sufficient bandwidth for the majority of current consumer grade applications, and the cost of upgrading to the PCIe 6.0 standard would outweigh any potential gains – at least for now. For the client market, upgrading to PCIe 6.0 would be akin to rolling out 8k resolution televisions at a time when 4k is the content resolution.
Instead, the immediate need for PCIe 6.0 will be far more pronounced in the server compute industry, as well as with GPUs. In these particular applications, high data throughput is needed for running things like large-scale simulations, processing massive data sets, or hosting advanced cloud-based applications. As cloud service providers begin investing in generative AI technologies such as GPT, the increased data bandwidth offered by PCIe 6.0 starts to look very appealing. Large-scale compute operations can also justify the cost of upgrading to new PCIe standards, because the gains will be comparatively much greater over time.
The potential challenges of adopting PCIe 6.0
The transition to PCIe 6.0 introduces complexities for developers. The introduction of technologies like PAM-4 electrical signaling in PCIe 6.0 have immense potential, but developers will need to be more precise in their designs in order to take advantage of them. PAM-4 allows for more data to be sent in the same amount of time, but it also makes the system more sensitive to noise and errors due to the closer signal levels. A new method for packing data in PCIe 6.0, called FLITs, breaks down data into smaller, more manageable units, which can improve efficiency and reduce latency but also requires a rethinking of how data is packaged and processed.
The progression to PCIe 6.0 marks a significant step in data transfer technology. As industries continue to evolve, and as AI and ML applications become more prevalent, the demand for faster and more efficient data transfer methods will undoubtedly grow. PCIe 6.0, with its advanced bandwidth and capabilities, seems poised to meet these demands, and will soon shape the future of data transfer.
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