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ORCID39th DCIS 2024: Catania, Italy
- 39th Conference on Design of Circuits and Integrated Systems, DCIS 2024, Catania, Italy, November 13-15, 2024. IEEE 2024, ISBN 979-8-3503-6439-2
- Gianluca Giustolisi, Alfio Dario Grasso, Muhammad Zahid Naveed, Marco Privitera:
A Three-Stage Operational Transconductance Amplifier in TFT Flexible-Substrate Process. 1-6 - P. González-Bautista, M. Palmero-Delgado, Clara Isabel Luján-Martínez, Jose Maria Hinojo Montero, Ramón González Carvajal, F. Muñnoz-Chavero:
Adaptive Single-Event Latch-up Protector for Space Applications. 1-6 - Hélio Sousa Mendonça, Cristian Zambelli, José Carlos Alves:
A MQTT-based infrastructure to support Cooperative Online Learning Activities. 1-6 - Miguel Cubero, Álvaro Hernández, Javier González:
An Open-Source VLBI Digital Backend for Low-Cost FPGA-based SoCs. 1-6 - Iñigo Díez De Ulzurrun, Juan Encinas, Alfonso Rodríguez, Andrés Otero:
Cloud-Edge Continuum Infrastructure for Reconfigurable Multi-Accelerator Systems. 1-6 - Javier De Mena Pacheco, Borja Gutiérrez De Cabiedes, Amadeo de Gracia Herranz, Marisa López-Vallejo:
A Lightweight Analog RFID Front-End for Interfacing Sensors. 1-6 - Ana Pérez-Márquez, Mildred Puerto-Coy, Pablo Casado, Julen Mendikute:
Functional printing for main distortion points in cured composite parts. 1-6 - Umberto Ferlito, Calogero Marco Ippolito, Mirko Cassalini, Danilo Termini, Giuseppe Bruno:
A 13.92-ENOB 762ksps Bottom Sampling Capacitive SAR ADC for Medical Applications. 1-6 - Owen O'Connor, Tarek Elfouly, Ali Alouani:
Demonstration of a NEMS Comb Drive for the Use of High Speed, High Efficiency Analog Multiplications. 1-5 - Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo:
The Self-Oscillating Dickson Charge Pump. 1-6 - Kenneth Palma, Francesc Moll:
Steady-State Design Equations of Cross-Coupled Charge Pumps and Application to 28 nm FDSOI Technology. 1-6 - Aleksei Nerushenko, Héctor Solar, Andoni Beriain, Ainhoa Rezola, Roc Berenguer:
A Verilog-A superconducting qubit model for co-simulation with control and readout systems in the Cadence Analog Environment. 1-6 - Antonio Velarte, Antonio Castel, Aránzazu Otín, Esther Pueyo:
Compact System for Stimulation and Recording of Field Potentials from Cardiac Tissue Preparations. 1-5 - José María López-Villegas, Maria Nieves Vidal Martinez:
3D printed compact 2-way Wilkison power divider/combiner for RF applications. 1-4 - Danish Kaleem Ansari, Capodivacca Giovanni, Syed Usman Amin, Andrea Baschirotto:
Python and SIMETRIX/SIMPLIS based automated platform for the DC-DC Converter with current mode control. 1-4 - Naoto Miyazaki, Toru Tanzawa:
Design of Switched-Capacitor AC-DC Voltage-Down Converters Driven by Highly Resistive Energy Transducers. 1-6 - Jon Gutiérrez-Zaballa, Koldo Basterretxea, Javier Echanobe:
Designing DNNs for a trade-off between robustness and processing performance in embedded devices*. 1-6 - Andrea Floridia, Michelangelo Grosso:
Test mode selection and data I/O by means of a new Scan-based interface. 1-6 - Riccardo Sessa, Katia Samperi, Nunzio Spina, Giuseppe Palmisano:
A GaN switched-capacitor PWM generator for a current-mode control of switching power converters. 1-5 - Jonas Ruchti, Sahitya V. Vegesna, Venkata Rao Rayapati, Heidemarie Schmidt, Michael Pehl:
On the Importance of Physical Model Parameters for PUF Performance: A Case Study on BFO Memristors. 1-6 - Özgür Ozan Yilmaz, Melahat Bilge Demirköz, Müstak Erhan Yalçin:
Single Event Upset Tolerant TRNG Design and Its Tests Under Radiation. 1-6 - Francisco Albertuz, Mario Garrido:
A Serial Low-Switching FFT Architecture Specifically Tailored for Low Power Consumption. 1-6 - Alba Páez-Montoro, Celia López-Ongil, Mario García-Valderas, Susana Patón:
A Comparison of Frequency-to-Digital Conversion Architectures in VCO-ADCs Built with Standard Cells. 1-6 - Pedro Paz, Mario Garrido:
A 12.8-GS/s 32-Parallel 1 Million-Point FFT. 1-6 - Michele Noviello, Andrés Quintero, Susana Patón:
Parasitic Capacitance Cancellation and SNR Improvement for Capacitance-to-Digital Converters based on a Switched-Capacitor Feedback. 1-6 - V. Mahboubi, Á. Gómez, Antonio Calomarde, Daniel Arumí, R. Rodríguez, Salvador Manich:
Engineering UGR-VCMTCF RRAM Model for Adjusting to TiN/Ti/HfO2/W Devices. 1-6 - Dian Tian, Ningmei Yu, Jiahao Tang, Tao Fu, Álvaro Hernández, Jesús Ureña:
A Hardware Architecture for Frequency-Domain Image Processing Based on Split-Radix 2-4 FFT. 1-6 - Eugeni Casadesus, Aleix Valdivieso, Michelle Vargas, Marius Monton:
Deploying Neural Networks on RISC-V with VPU. 1-6 - Javier Beloso-Legarra, Victor Marco-Barricart, Jose M. Algueta-Miguel, Carlos Aristoteles De la Cruz-Blas, Antonio J. López-Martín:
Fully-Differential Single-Stage Class-AB Adaptive Nested Current Mirror OTA. 1-6 - Fernando Flores, María Dolores Valdés Peña, José Manuel Villapún Sánchez, Jesús Manuel Costa Pazo, Camilo Quintáns Graña:
Evaluation of the Versal Intelligent Engines for Digital Signal Processing Basic Core Units. 1-6 - Murti Bär, Lluc Crespí-Castañer, Joan Font-Rosselló, Alejandro Morán, Vicent Canals, Miquel Roca, Josep L. Rosselló:
Tropical Pruning Strategies for ANN optimization in IoT. 1-6 - Raúl Gómez-Varela, David Aledo, Héctor Posadas, Eugenio Villar:
AI-based estimation of embedded software execution cycles in host-compiled simulation. 1-6 - Michele Marrella, Alfio Dario Grasso, Manuela La Rosa, Giovanni Sicurella:
A Monolithic GaN shift register with reduced power consumption. 1-5 - Claudiu Nechifor, Américo Dias, Laurentiu Matei:
A Novel Low-Power Subthreshold Voltage Reference Circuit with Enhanced PSRR. 1-6 - César Fuguet, Eric Guthmuller, Andrea Bocco, Jérôme Fereyre, Adrian Evans, Yves Durand:
A Variable and Extended Precision (VRP) Accelerator and its 22 nm SoC Implementation. 1-6 - Fernando Flores, Oscar López Sánchez, Luis Jacobo Alvarez Ruiz de Ojeda, María Dolores Valdés Peña, José Manuel Villapún Sánchez:
Acceleration of a Compute-Intensive Algorithm for Power Electronic Converter Control Using Versal AI Engines. 1-6 - Rashed Al Amin, Roman Obermaisser:
BiDSRS: Resource Efficient Real Time Bidirectional Super Resolution System for FPGAs. 1-6 - A. Algarín, D. Martín, Paula Daza, Gloria Huertas, Alberto Yúfera:
Integrated Electrode-Based Systems for Stem-Cell Stimulation. 1-6 - Marta Laguna Garcia, Esteban Marsal, Francisco Colodro, Juana Maria Martinez-Heredia:
Digital-to-analog converters based on Time-Interleaved Sigma-Delta Modulation with Analog Multiplexing. 1-6 - P. Manrique-Merchán, G. Liñán-Cembrano, J. M. de La Rosa:
AISAD: A User-Friedly AI-Assisted MATLAB Tool for the High-Level Design of ΣΔ Modulators. 1-6 - Alberto Ramírez-Bárcenas, Mario García-Valderas, Celia López-Ongil:
Power Oriented Hardware-Software Codesign for a Planetary Exploration Multisensor Instrument. 1-6 - Sebastià A. Bota, Rafel Perelló, Salvador Barceló, Ivan de Paúl, Jaume Segura, Jaume Verd:
Design Guidelines for β-Multiplier Current Reference Circuits. 1-6 - Calogero Marco Ippolito, Antonella La Malfa, Giuseppe Bruno:
TMOS-based contactless temperature sensor for low-power applications. 1-4 - Juan Manuel Galán, Ainhoa Cortés, Andoni Irizar, Alejandro Arteaga, Jose Ignacio Garate, Armando Astarloa:
Smart Carrier for Scan Chain Emulation of ASIC Prototypes under Test. 1-6 - Riccardo Della Sala, Giuseppe Scotti:
Evaluation and Comparison of Physical Unclonable Functions suitable for FPGA Implementation. 1-6 - Ruolan Jia, Stefan Pechmann, Markus Fritscher, Christian Wenger, Lei Zhang, Amelie Hagelauer:
Soft-Error Analysis of RRAM 1T1R Compute-In-Memory Core for Artificial Neural Networks. 1-5 - A. Rojas, Gordana Jovanovic-Dolecek, J. M. de La Rosa, Gustavo Liñán Cembrano:
Increasing the Accuracy of Spectrogram-based Spectrum Sensing Trained by a Deep Learning Network Using a Resnet-18 Model. 1-4 - Katia Samperi, Andrea Ballo, Salvatore Pennisi, Alfio Dario Grasso:
A GaN-Based DC-DC Modular Switched Inductor Converter for Shading/Mismatch Mitigation in Bifacial Photovoltaic Systems. 1-4 - Víctor Manuel Bautista, Mario Garrido:
A Hardware-Efficient 1200-point FFT Architecture that Combines the Prime Factor and Cooley-Tukey Algorithms. 1-6 - Luis Esteban, Vladimir M. Milovanovic:
A 65 nm CMOS Battery-Less RFID Tag Featuring Short Range Communication with Commodity WiFi. 1-5 - Hanna Iva Busse, Taimur Gibran Rabuske, Mário Silva, Gonçalo Rodrigues, Diogo Miguel Caetano, Marcelino B. Santos, Jorge R. Fernandes:
A Small-Area Current-Mode Input ΣΔ Modulator for Under-the-Sensors ADC Arrays. 1-5 - Joaquín Álvarez-Molins, Enrique Martínez-Calvo, Gloria Santiago-Viejo, Francisco Rogelio Palomo-Pinto, Jose Maria Hinojo Montero, Fernando Muñoz-Chavero:
Design and Implementation of the Alpha Mission Satellite Payload for Space Radiation Measurement. 1-6 - Luís Parrilla Roure, Pablo Rodríguez-Iturriaga, Juan Antonio López-Villanueva, Salvador Rodríguez-Bolívar, Encarnación Castillo, Antonio García:
Towards efficient hardware digital twins of lithium-ion batteries. 1-6 - Unai Sainz-Estebanez, Unai Martinez-Corral, Koldo Basterretxea:
Hardware coprocessor integration with NEORV32: characterization for efficient implementation of RISC-V-based AI SoCs. 1-6 - Alejandro Casado-Galán, Francisco Eugenio Potestad-Ordóñez, Antonio J. Acosta, Erica Tena-Sánchez:
Electromagnetic Fault Injection Attack Methodology against AES Hardware Implementation. 1-6 - Miguel Martín-González, Erica Tena-Sánchez, F. Eugenio Potestad Ordóñez, Antonio J. Acosta:
Hardware implementations, SCA/FIA attacks, and countermeasures for the ASCON AEAD cipher: a review. 1-6 - Karim Marouan Chaffai, Roc Berenguer, Ainhoa Rezola, Javier Diaz, Héctor Solar, Andoni Beriain:
Exploring Dual-Frequency Implementation for Semi-Passive RFID Tags. 1-6 - Samuel Torres-Fau, Felipe Machado, Yubal Barrios, Antonio J. Sánchez, Roberto Sarmiento:
FPGA Implementation of a Low-Complexity H.264 Output Coding Stage for Space Missions. 1-6 - David Castells-Rufas, David Novo, Xavier Martorell:
An Educational Tool to Analyze the Hardware/Software Integration in RISC-V Systems. 1-6 - Roberto Vabres, Gabriele Bellocchi, Simone Rascunà, Fabrizio Roccaforte, Paola Mancuso, Paolo Badalà, Valeria Puglisi, Marilena Vivona, Isodiana Crupi:
A novel experiment approach to ohmic contact formation on p-doped SiC. 1-4
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last updated on 2025-01-15 20:33 CET by the dblp team
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