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Dionysios Diamantopoulos
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2020 – today
- 2023
- [j14]Burkhard Ringlein, François Abel, Dionysios Diamantopoulos, Beat Weiss, Christoph Hagleitner, Dietmar Fey:
Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures. IEEE Comput. Archit. Lett. 22(1): 9-12 (2023) - [j13]Abbas Haghi, Santiago Marco-Sola, Lluc Alvarez, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moretó:
WFA-FPGA: An efficient accelerator of the wavefront algorithm for short and long read genomics alignment. Future Gener. Comput. Syst. 149: 39-58 (2023) - [c39]Dionysios Diamantopoulos, Burkhard Ringlein, Beat Weiss, Mark A. Lantz, François Abel:
Composability of Cloud Accelerators in Virtual World Simulations. CLOUD 2023: 272-274 - [c38]Burkhard Ringlein, François Abel, Dionysios Diamantopoulos, Beat Weiss, Christoph Hagleitner, Dietmar Fey:
DOSA: Organic Compilation for Neural Network Inference on Distributed FPGAs. EDGE 2023: 43-50 - 2022
- [j12]Argyris Kokkinis, Dionysios Diamantopoulos, Kostas Siozios:
Dynamic Optimization of On-Chip Memories for HLS Targeting Many-Accelerator Platforms. IEEE Comput. Archit. Lett. 21(2): 41-44 (2022) - [j11]Runbin Shi, Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso:
Exploiting HBM on FPGAs for Data Processing. ACM Trans. Reconfigurable Technol. Syst. 15(4): 36:1-36:27 (2022) - [j10]Gagandeep Singh, Dionysios Diamantopoulos, Juan Gómez-Luna, Christoph Hagleitner, Sander Stuijk, Henk Corporaal, Onur Mutlu:
Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric. ACM Trans. Reconfigurable Technol. Syst. 15(4): 39:1-39:27 (2022) - [c37]Argyris Kokkinis, Dionysios Diamantopoulos, Kostas Siozios:
Dynamic Heap Management in High-Level Synthesis for Many-Accelerator Architectures. FPL 2022: 287-293 - [c36]Gagandeep Singh, Dionysios Diamantopoulos, Juan Gómez-Luna, Sander Stuijk, Henk Corporaal, Onur Mutlu:
LEAPER: Fast and Accurate FPGA-based System Performance Prediction via Transfer Learning. ICCD 2022: 499-508 - [i8]Gagandeep Singh, Dionysios Diamantopoulos, Juan Gómez-Luna, Sander Stuijk, Henk Corporaal, Onur Mutlu:
LEAPER: Modeling Cloud FPGA-based Systems via Transfer Learning. CoRR abs/2208.10606 (2022) - 2021
- [j9]Gagandeep Singh, Mohammed Alser, Damla Senol Cali, Dionysios Diamantopoulos, Juan Gómez-Luna, Henk Corporaal, Onur Mutlu:
FPGA-Based Near-Memory Acceleration of Modern Data-Intensive Applications. IEEE Micro 41(4): 39-48 (2021) - [c35]Burkhard Ringlein, François Abel, Dionysios Diamantopoulos, Beat Weiss, Christoph Hagleitner, Marc Reichenbach, Dietmar Fey:
A Case for Function-as-a-Service with Disaggregated FPGAs. CLOUD 2021: 333-344 - [c34]Dionysios Diamantopoulos, Raphael Polig, Burkhard Ringlein, Mitra Purandare, Beat Weiss, Christoph Hagleitner, Mark A. Lantz, François Abel:
Acceleration-as-a-µService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs. CLOUD 2021: 726-729 - [c33]Christoph Hagleitner, Dionysios Diamantopoulos, Burkhard Ringlein, Constantinos Evangelinos, Charles R. Johns, Rong N. Chang, Bruce D'Amora, James A. Kahle, James C. Sexton, Michael Johnston, Edward Pyzer-Knapp, Chris Ward:
Heterogeneous Computing Systems for Complex Scientific Discovery Workflows. DATE 2021: 13-18 - [c32]Christian Pilato, Stanislav Böhm, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Vojtech Cima, Radim Cmar, Dionysios Diamantopoulos, Fabrizio Ferrandi, Jan Martinovic, Gianluca Palermo, Michele Paolino, Antonio Parodi, Lorenzo Pittaluga, Daniel Raho, Francesco Regazzoni, Katerina Slaninová, Christoph Hagleitner:
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. DATE 2021: 1320-1325 - [c31]Gagandeep Singh, Dionysios Diamantopoulos, Juan Gómez-Luna, Sander Stuijk, Onur Mutlu, Henk Corporaal:
Modeling FPGA-Based Systems via Few-Shot Learning. FPGA 2021: 146 - [c30]Abbas Haghi, Santiago Marco-Sola, Lluc Alvarez, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moretó:
An FPGA Accelerator of the Wavefront Algorithm for Genomics Pairwise Alignment. FPL 2021: 151-159 - [i7]Christian Pilato, Stanislav Böhm, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Vojtech Cima, Radim Cmar, Dionysios Diamantopoulos, Fabrizio Ferrandi, Jan Martinovic, Gianluca Palermo, Michele Paolino, Antonio Parodi, Lorenzo Pittaluga, Daniel Raho, Francesco Regazzoni, Katerina Slaninová, Christoph Hagleitner:
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. CoRR abs/2103.04185 (2021) - [i6]Dionysios Diamantopoulos, Raphael Polig, Burkhard Ringlein, Mitra Purandare, Beat Weiss, Christoph Hagleitner, Mark A. Lantz, François Abel:
Acceleration-as-a-μService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs. CoRR abs/2106.06293 (2021) - [i5]Gagandeep Singh, Mohammed Alser, Damla Senol Cali, Dionysios Diamantopoulos, Juan Gómez-Luna, Henk Corporaal, Onur Mutlu:
FPGA-based Near-Memory Acceleration of Modern Data-Intensive Applications. CoRR abs/2106.06433 (2021) - [i4]Gagandeep Singh, Dionysios Diamantopoulos, Juan Gómez-Luna, Christoph Hagleitner, Sander Stuijk, Henk Corporaal, Onur Mutlu:
NERO: Accelerating Weather Prediction using Near-Memory Reconfigurable Fabric. CoRR abs/2107.08716 (2021) - 2020
- [c29]Dionysios Diamantopoulos, Florian Scheidegger, Stefan Mach, Fabian Schuiki, Germain Haugou, Michael Schaffner, Frank K. Gürkaynak, Christoph Hagleitner, A. Cristiano I. Malossi, Luca Benini:
XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs. COOL CHIPS 2020: 1-3 - [c28]Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso:
High Bandwidth Memory on FPGAs: A Data Analytics Perspective. FPL 2020: 1-8 - [c27]Gagandeep Singh, Dionysios Diamantopoulos, Christoph Hagleitner, Juan Gómez-Luna, Sander Stuijk, Onur Mutlu, Henk Corporaal:
NERO: A Near High-Bandwidth Memory Stencil Accelerator for Weather Prediction Modeling. FPL 2020: 9-17 - [c26]Abbas Haghi, Lluc Alvarez, Jordà Polo, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moretó:
A Hardware/Software Co-Design of K-mer Counting Using a CAPI-Enabled FPGA. FPL 2020: 57-64 - [c25]Dionysios Diamantopoulos, Burkhard Ringlein, Mitra Purandare, Gagandeep Singh, Christoph Hagleitner:
Agile Autotuning of a Transprecision Tensor Accelerator Overlay for TVM Compiler Stack. FPL 2020: 310-316 - [c24]Dionysios Diamantopoulos, Mitra Purandare, Burkhard Ringlein, Christoph Hagleitner:
PHRYCTORIA: A Messaging System for Transprecision OpenCAPI-attached FPGA Accelerators. IPDPS Workshops 2020: 98-106 - [i3]Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso:
High Bandwidth Memory on FPGAs: A Data Analytics Perspective. CoRR abs/2004.01635 (2020) - [i2]Dionysios Diamantopoulos, Burkhard Ringlein, Mitra Purandare, Gagandeep Singh, Christoph Hagleitner:
Agile Autotuning of a Transprecision Tensor Accelerator Overlay for TVM Compiler Stack. CoRR abs/2004.10854 (2020) - [i1]Gagandeep Singh, Dionysios Diamantopoulos, Christoph Hagleitner, Juan Gómez-Luna, Sander Stuijk, Onur Mutlu, Henk Corporaal:
NERO: A Near High-Bandwidth Memory Stencil Accelerator for Weather Prediction Modeling. CoRR abs/2009.08241 (2020)
2010 – 2019
- 2019
- [c23]Dionysios Diamantopoulos, Christoph Hagleitner:
HelmGemm: Managing GPUs and FPGAs for Transprecision GEMM Workloads in Containerized Environments. ASAP 2019: 71-74 - [c22]Jan van Lunteren, Ronald P. Luijten, Dionysios Diamantopoulos, Florian Auernhammer, Christoph Hagleitner, Lorenzo Chelini, Stefano Corda, Gagandeep Singh:
Coherently Attached Programmable Near-Memory Acceleration Platform and its application to Stencil Processing. DATE 2019: 668-673 - [c21]Gagandeep Singh, Dionysios Diamantopoulos, Christoph Hagleitner, Sander Stuijk, Henk Corporaal:
NARMADA: Near-Memory Horizontal Diffusion Accelerator for Scalable Stencil Computations. FPL 2019: 263-269 - [c20]Gagandeep Singh, Dionysios Diamantopoulos, Sander Stuijk, Christoph Hagleitner, Henk Corporaal:
Low Precision Processing for High Order Stencil Computations. SAMOS 2019: 403-415 - 2018
- [c19]Dionysios Diamantopoulos, Heiner Giefers, Christoph Hagleitner:
ecTALK: Energy efficient coherent transprecision accelerators - The bidirectional long short-term memory neural network case. COOL CHIPS 2018: 1-3 - [c18]Dionysios Diamantopoulos, Christoph Hagleitner:
A System-Level Transprecision FPGA Accelerator for BLSTM Using On-chip Memory Reshaping. FPT 2018: 338-341 - [c17]Heiner Giefers, Dionysios Diamantopoulos:
Extending the POWER Architecture with Transprecision Co-Processors. ISCAS 2018: 1-5 - 2017
- [j8]Ioannis Koutras, Konstantinos Maragos, Dionysios Diamantopoulos, Kostas Siozios, Dimitrios Soudris:
On supporting rapid prototyping of embedded systems with reconfigurable architectures. Integr. 58: 91-100 (2017) - [j7]Christoforos Kachris, Dionysios Diamantopoulos, Georgios Ch. Sirakoulis, Dimitrios Soudris:
An FPGA-based Integrated MapReduce Accelerator Platform. J. Signal Process. Syst. 87(3): 357-369 (2017) - 2015
- [j6]Dionysios Diamantopoulos, Sotirios Xydis, Kostas Siozios, Dimitrios Soudris:
Mitigating Memory-Induced Dark Silicon in Many-Accelerator Architectures. IEEE Comput. Archit. Lett. 14(2): 136-139 (2015) - [j5]Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris:
GENESIS: Parallel Application Placement onto Reconfigurable Architectures (Invited for the Special Issue on Runtime Management). ACM Trans. Embed. Comput. Syst. 14(1): 18:1-18:26 (2015) - [c16]Kostas Siozios, Peter Figuli, Harry Sidiropoulos, Carsten Tradowsky, Dionysios Diamantopoulos, Konstantinos Maragos, Shalina Percy Delicia, Dimitrios Soudris, Jürgen Becker:
TEAChER: TEach AdvanCEd Reconfigurable Architectures and Tools. ARC 2015: 103-114 - [c15]Dionysios Diamantopoulos, Sotirios Xydis, Kostas Siozios, Dimitrios Soudris:
Dynamic Memory Management in Vivado-HLS for Scalable Many-Accelerator Architectures. ARC 2015: 117-128 - [c14]Efstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, George Economakos:
Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures. ARC 2015: 321-330 - [c13]George Lentaris, Ioannis Stamoulias, Dionysios Diamantopoulos, Konstantinos Maragos, Kostas Siozios, Dimitrios Soudris, Marcos Avilés Rodrigálvarez, Manolis I. A. Lourakis, Xenophon Zabulis, Ioannis Kostavelis, Lazaros Nalpantidis, Evangelos Boukas, Antonios Gasteratos:
SPARTAN/SEXTANT/COMPASS: Advancing Space Rover Vision via Reconfigurable Platforms. ARC 2015: 475-486 - [c12]Dionysios Diamantopoulos, Sotirios Xydis, Kostas Siozios, Dimitrios Soudris:
High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators on FPGAs. FPL 2015: 1-2 - [c11]Dionysios Diamantopoulos, Christoforos Kachris:
High-level synthesizable dataflow MapReduce accelerator for FPGA-coupled data centers. SAMOS 2015: 26-33 - 2014
- [j4]Ioannis Kostavelis, Lazaros Nalpantidis, Evangelos Boukas, Marcos Avilés Rodrigálvarez, Ioannis Stamoulias, George Lentaris, Dionysios Diamantopoulos, Kostas Siozios, Dimitrios Soudris, Antonios Gasteratos:
SPARTAN: Developing a Vision System for Future Autonomous Space Exploration Robots. J. Field Robotics 31(1): 107-140 (2014) - [j3]Efstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, Kostas Siozios, George Economakos, Dimitrios Soudris:
A framework for rapid evaluation of heterogeneous 3-D NoC architectures. Microprocess. Microsystems 38(4): 292-303 (2014) - [j2]Dionysios Diamantopoulos, Efstathios Sotiriou-Xanthopoulos, Kostas Siozios, George Economakos, Dimitrios Soudris:
Plug&Chip: A Framework for Supporting Rapid Prototyping of 3D Hybrid Virtual SoCs. ACM Trans. Embed. Comput. Syst. 13(5s): 168:1-168:25 (2014) - [c10]Dionysios Diamantopoulos, George Economakos, Dionysios I. Reisis:
Using high-level synthesis to build memory and datapath optimized DSP accelerators. ICECS 2014: 714-717 - 2013
- [c9]Dionysios Diamantopoulos, Kostas Siozios, Efstathios Sotiriou-Xanthopoulos, George Economakos, Dimitrios Soudris:
HVSoCs: A Framework for Rapid Prototyping of 3-D Hybrid Virtual System-on-Chips. IPDPS Workshops 2013: 2194-2199 - [c8]Dionysios Diamantopoulos, Christoforos E. Economakos, Dimitrios Soudris, George Economakos:
A new design paradigm for floating point DSP applications based on ESL/HLS and FPGAs? ISSPIT 2013: 404-409 - 2012
- [j1]Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris:
A Systematic Methodology for Reliability Improvements on SoC-Based Software Defined Radio Systems. VLSI Design 2012: 784945:1-784945:15 (2012) - [c7]Dionysios Diamantopoulos, Kostas Siozios, George Lentaris, Dimitrios Soudris, Marcos Avilés Rodrigálvarez:
SPARTAN project: On profiling computer vision algorithms for rover navigation. AHS 2012: 174-181 - [c6]George Lentaris, Dionysios Diamantopoulos, Kostas Siozios, Dimitrios Soudris, Marcos Avilés Rodrigálvarez:
Hardware implementation of stereo correspondence algorithm for the ExoMars mission. FPL 2012: 667-670 - [c5]George Lentaris, Dionysios Diamantopoulos, G. Stamoulias, Kostas Siozios, Dimitrios Soudris, Marcos Avilés Rodrigálvarez:
FPGA-based path-planning of high mobility rover for future planetary missions. ICECS 2012: 85-88 - 2011
- [c4]Dionysios Diamantopoulos, Panagiotis Galiatsatos, Athanasios Karachalios, George Lentaris, Dionisios I. Reisis, Dimitrios Soudris:
Configurable baseband digital transceiver for Gbps wireless 60 GHz communications. ICECS 2011: 192-195 - [c3]Efstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, George Economakos, Dimitrios Soudris:
Design and experimentation with low-power morphable multipliers. ICECS 2011: 752-755 - [c2]Kostas Siozios, Dionysios Diamantopoulos, Ioannis Kostavelis, Evangelos Boukas, Lazaros Nalpantidis, Dimitrios Soudris, Antonios Gasteratos, Marcos Avilés, Iraklis Anagnostopoulos:
SPARTAN project: Efficient implementation of computer vision algorithms onto reconfigurable platform targeting to space applications. ReCoSoC 2011: 1-9 - [c1]Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris:
Thermal optimization for micro-architectures through selective block replication. ICSAMOS 2011: 59-66
Coauthor Index
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