default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID18th ICECS 2011: Beirut, Lebanon
- 18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011. IEEE 2011, ISBN 978-1-4577-1845-8
- Michael Guarisco, Eric Dabellani, Nicolas Marques, Hassan Rabah
, Yves Berviller, Serge Weber:
An efficient VLSI implementation of H.264/AVC intra-frame transcoder. 1-4 - Willy Aubry, Bertrand Le Gal, Dominique Dallet, Simon Desfarges, Daniel Négru:
A system aproach for reducing power consumption of multimedia devices with a low QoE impact. 5-8 - Georgios Georgis, George Lentaris, Dionysios I. Reisis:
Study of interpolation filters for motion estimation with application in H.264/AVC encoders. 9-12 - Ahmed Ben Atitallah, Hassen Loukil, Nouri Masmoudi:
HW/SW TQ/IQT design for H.264/AVC. 13-16 - Rabin Raut, Md. A. H. Talukder:
Estimating the design value(s) of the shunt-peaking inductor(s) in CMOS trans-impedance amplifier system by placement of poles and zeros. 17-20 - Marcello De Matteis, Giuseppe Cocciolo, Marco De Blasi, Andrea Baschirotto:
A 1.3mW CMOS 65nm 4th order 52dB-DR continuous-time analog filter for DVB-T receivers. 21-24 - Nicolas Laflamme-Mayer, Yves Blaquière, Mohamad Sawan:
A large range and fine tuning configurable Bandgap reference dedicated to wafer-scale systems. 25-28 - Sajjad Moshfe, Abdollah Khoei, Khayrollah Hadidi, Pourya Hoseini:
Design of a programmable analog CMOS rational-powered membership function generator in current mode approach. 29-32 - Fawzi M. Al-Naima, Bessam Z. Al-Jewad:
Mixed symbolic-numerical techniques in fault diagnosis using fault rubber stamps. 33-36 - Ndiogou Tall, Nicolas Dehaese, Sylvain Bourdel, B. Bonat:
An all-digital clock and data recovery circuit for low-to-moderate data rate applications. 37-40 - Yier Jin, Yiorgos Makris:
PSCML: Pseudo-Static Current Mode Logic. 41-44 - Matheus T. Moreira, Bruno Cruz de Oliveira, Julian J. H. Pontes, Fernando Moraes, Ney Calazans:
Adapting a C-element design flow for low power. 45-48 - Hamid R. Zarghi, Mohammad Sharifkhani, Iman Gholampour:
Implementation of a cost efficient SSL based on an Angular beamformer SRP-PHAT. 49-52 - Benjamin Stefan Devlin, Makoto Ikeda, Kunihiro Asada:
Gate-level autonomous watchdog circuit for error robustness based on a 65nm self synchronous system. 53-56 - Y. Abiven, Francois Rivet, Yann Deval, Dominique Dallet, Didier Belot, Thierry Taris:
A low-power 2 GHz discrete time weighting system dedicated to Sampled Analog Signal Processing. 57-60 - Hamada Alshaer, Raed M. Shubair, Thierry Ernst, Arnaud de La Fortelle:
On provisioning high quality in intelligent transportation services. 61-64 - Imene Ben Hafaiedh, Susanne Graf, Mohamad Jaber:
Model-based design and distributed implementation of bus arbiter for multiprocessors. 65-68 - Houda Daoud, Samir Ben Salem, Sonia Zouari, Mourad Loulou:
Feed-forward ΔΣ modulators topologies design for broadband communications applications. 69-72 - Mahmoud Al-Qutayri, Saleh R. Al-Araji, Omar Al-Kharji Al-Ali, Nader Anani:
Adaptive digital tanlock loop with no delay. 73-76 - Marcello De Matteis, Marco De Blasi, Giuseppe Cocciolo, Andrea Baschirotto, M. Sabatini:
A 1V 115μW 20nV/√Hz 15-50dB-range PGA with 5MHz bandwidth for UWB personal area network. 77-80 - Goran Panic, Thomas Basmer, Oliver Schrape, Steffen Peter, Frank Vater, Klaus Tittelbach-Helmrich:
Sensor node processor for security applications. 81-84 - Christine Meguerditchian, Haïdar Safa, Wassim El-Hajj:
New reader anti-collision algorithm for dense RFID environments. 85-88 - Michael Hofstätter, Martin Litzenberger, Daniel Matolin, Christoph Posch:
Hardware-accelerated address-event processing for high-speed visual object recognition. 89-92 - Bassam Moslem, Mohamad Khalil, Mohamad O. Diab, Aly Chkeir, Catherine Marque:
A multisensor data fusion approach for improving the classification accuracy of uterine EMG signals. 93-96 - Sergio Pernici, Pierangelo Confalonieri, Riccardo Martignone, Andrea Barbieri, Francesca Girardi, Alessandro Mecchia, Daniele Devecchi, Germano Nicollini:
1.05V 10.2mW WCDMA analog baseband in 65nm digital CMOS technology. 97-100 - Van Tam Nguyen, Hasham Ahmed Khushk, Chadi Jabbour, Patrick Loumeau:
High pass filter implementation comparison in unity STF high pass ΔΣ modulator. 101-104 - Remy Cellier, Gaël Pillonnet, Nacer Abouchi, Roberto M'Rad, Angelo Nagari:
Analysis and design of an analog control loop for digital input class D amplifiers. 105-108 - Qingyun Ma, Mohammad Rafiqul Haider, Yehia Massoud:
Robust power oscillator design for inductive-power link applications. 109-112 - Damiano Cascella, Gianfranco Avitabile, Francesco Cannone, Giuseppe Coviello:
A 2-GS/s 0.35μm SiGe track-and-hold amplifier with 7-GHz analog bandwidth using a novel input buffer. 113-116 - Sylvain Clerc, Fady Abouzeid, Fabrice Argoud, Abhay Kumar, Rajesh Kumar, Philippe Roche:
A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform. 117-120 - Evaldo Renó Faria Cintra, Tales Cleber Pimenta, Helton Carvalho, Robson L. Moreno:
An FPGA system using fuzzy clustering and correlation to diagnose angina. 121-124 - Islam Seoudi, Karima Amara, Fabrice Gayral, Renzo Dal Molin, Amara Amara:
Multi-electrode system for pacemaker applications. 125-128 - Kapil Dev, Smriti Sharma, Vibhu Vivek, Babur Hadimioglu, Yehia Massoud:
Design of a scalable DNA shearing system using phased-array ultrasonic transducer. 129-132 - Maryam Karimi, Hooman Nabovati:
Design of a high efficient fully integrated CMOS rectifier using bootstrapped technique for sub-micron and wirelessly powered applications. 133-136 - Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini:
Asymmetric large size multiplication using embedded blocks with efficient compression technique in FPGAs. 137-140 - Sayeeda Sultana, Katarzyna Radecka:
Reversible implementation of square-root circuit. 141-144 - Hussein Karaki, Haitham Akkary, Shahrokh Shahidzadeh:
X86-ARM binary hardware interpreter. 145-148 - E. Theodorakis, Vassilis Paliouras:
On the impact of encoding on the complexity of residue arithmetic circuits. 149-152 - Konstantinos Manolopoulos, Dionisios I. Reisis, Vassilios A. Chouliaras:
An efficient multiple precision floating-point multiplier. 153-156 - Iftekhar Ibne Basith, Tareq Muhammad Supon, Ajit Muhury, Rashid Rashidzadeh, Majid Ahmadi:
Performance enhancement of single electron junction 1-bit full adder. 157-160 - Simon Vanden Bussche, Pieter De Wit, Elie Maricau, Georges G. E. Gielen:
Impact analysis of stochastic transistor aging on current-steering DACs in 32nm CMOS. 161-164 - Ahmed Fawaz, Ameen Jaber, Ali Kassem, Ali Chehab, Ayman I. Kayssi:
Assessing testing techniques for resistive-open defects in nanometer CMOS adders. 165-168 - Nayla El-Kork, Raed M. Shubair, Paul Moretti, Bernard Jacquier:
Hybrid nanoparticle biomarkers in Near-Field Optical Microscopy. 169-175 - Santipab Sainon, Sanchai Harnsoongnoen, Chiranut Sa-ngiamsak:
Comparison on the performance of the confined-chacogenide with thin metal interlayer and optimised lateral phase change memories. 176-179 - Manel Ben-Romdhane, Asma Maalej, Rihab Lahouli, Chiheb Rebai:
Test setup and spurious replicas identification in time-quantized pseudorandom sampling-based ADC in SDR multistandard receiver. 180-183 - Antonio D. Reis, José F. Rocha, Atílio Gameiro, José P. Carvalho:
Prefilter bandwidth effects in sequential symbol synchronizers based on pulse comparison operating by positive transitions at quarter rate. 184-187 - Naveen Naraharisetti, Sleiman Bou-Sleiman, Mohammed Ismail:
Mixed-Mode I/Q mismatches compensation in low-IF quadrature receivers. 188-191 - Dionysios Diamantopoulos, Panagiotis Galiatsatos, Athanasios Karachalios, George Lentaris, Dionisios I. Reisis, Dimitrios Soudris:
Configurable baseband digital transceiver for Gbps wireless 60 GHz communications. 192-195 - Chelho Chung, Young-Han Kim, Tae-Hun Ki, Kyusung Bae, Jongbae Kim:
Fully integrated ultra-low-power 900 MHz RF transceiver for batteryless wireless microsystems. 196-199 - Mohammad Reza Asgari, Seyyed Hossein Pishgar Komleh, Omid Hashemipour:
A reliable full-swing low-distortion CMOS bootstrapped sampling switch. 200-203 - Kapil Dev, Yehia Massoud:
On the design of balanced carbon nanotube field-effect transistor gates. 204-207 - Samaneh Babayan Mashhadi, Seyyed Iman Pishbin:
Efficient modeling and analysis of switch-induced error voltage in high resolution SAR ADCs. 208-211 - Mohsen Hashemi, Mohammad Sharifkhani, Mohammad Gholami:
A low power 1-V 10-bit 40-MS/s pipeline ADC. 212-215 - Xueqing Li, Qi Wei, Huazhong Yang:
Code-independent output impedance: A new approach to increasing the linearity of current-steering DACs. 216-219 - Mohamed Abbas, Takahiro J. Yamaguchi, Yasuo Furukawa, Satoshi Komatsu, Kunihiro Asada:
Novel technique for minimizing the comparator delay dispersion in 65nm CMOS technology. 220-223 - Vincent O'Brien, Brendan Mullane:
High order mismatch noise shaping for bandpass DACs. 224-227 - Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour:
PSP based DCG-FGT transistor model including characterization procedure. 228-231 - Bahman Yousefzadeh, Mohammad Sharifkhani:
An audio band low voltage CT-ΔΣ modulator with VCO-based quantizer. 232-235 - Chadi Jabbour, Hasham Ahmed Khushk, Van Tam Nguyen, Patrick Loumeau:
High-pass or low-pass ΣΔ modulators? 236-239 - Sylvain Maréchal, François Krummenacher, Maher Kayal:
Optimal filtering of an incremental second-order MASH11 sigma-delta modulator. 240-243 - Chadi Jabbour, Hussein Fakhoury, Van Tam Nguyen, Patrick Loumeau:
A novel design methodology for multiplierless filters applied on ΔΣ decimators. 244-247 - Salwa Fakhfakh Sahnoun, Ahmed Fakhfakh, Nouri Masmoudi, Hervé Levi:
High level characterization and optimization of a GPSK modulator with genetic algorithm. 248-251 - Qingyun Ma, Mohammad Rafiqul Haider, Yehia Massoud:
Power-loss reduction of a MOSFET cross-coupled rectifier by employing zero-voltage switching. 252-255 - Rana Farah, Qifeng Gan, J. M. Pierre Langlois, Guillaume-Alexandre Bilodeau, Yvon Savaria:
A tracking algorithm suitable for embedded systems implementation. 256-259 - Qassim Nasir, Saleh R. Al-Araji:
Performance evaluation of Sigma Delta Zero Crossing DPLL. 260-263 - Mohannad Elsayed, Frederic Nabki, Mourad N. El-Gamal:
A 2000°/s dynamic range bulk mode dodecagon gyro for a commercial SOI technology. 264-267 - Jean Marie Darmanin, Ivan Grech, Edward Gatt, Owen Casha:
Design of a 2-axis MEMS accelerometer. 268-271 - Kapil Dev, Vibhu Vivek, Babur Hadimioglu, Yehia Massoud:
Analytical modeling and design of ring shaped piezoelectric transducers. 272-275 - Samir Boukhenous, Mokhtar Attari:
A low cost sensing system for foot stress recovering on a Freeman platform. 276-280 - Mohammad Hossein Maghami, Amir M. Sodagar:
Fully-integrated, large-time-constant, low-pass, Gm-C filter based on current conveyors. 281-284 - João Paulo Carmo, R. P. Rocha, Manuel F. Silva, D. S. Ferreira, João F. Ribeiro, José Higino Correia:
Stereoscopic image sensor with low-cost RGB filters tunned for the visible range. 285-288 - Jade Ayoub, Bertrand Granado, Olivier Romain, Yasser Mohanna:
A prototype circuit for a smart 3D endoscopic videocapsule based on SVM and stereovision. 289-292 - Karim Eduardo Hay Alonso, Abdel Karim Hay Harb, Luis David Prieto Martinez:
Modulation characteristics for a bidirectional AC-DC converter based on dual active bridge (January 2010). 293-296 - Chin-Long Wey, Chan-I Chiu, Kun-Chun Chang, Chung-Hsien Hsu, Gang-Neng Sung:
Design of ultra-wide-load, high-efficient DC-DC buck converters. 297-300 - Salim N. Batlouni, Hala S. Karaki, Fadi A. Zaraket, Fadi N. Karameh:
Mathifier - Speech recognition of math equations. 301-304 - Manal Jalloul, Mohammed Baydoun, Mohamad Adnan Al-Alaoui:
Gauss-Newton image registration with CUDA. 305-309 - Vikas Singal, Yehia Massoud:
A random demodulator with a software-based integrator resetting scheme. 310-313 - Boram Lee, Ted Higman:
Extremely simple constant-gm technique for low voltage rail-to-rail amplifier input stage. 314-317 - Mortaza Mojarad, Mohammad Yavari:
A novel frequency compensation scheme for on-chip low-dropout voltage regulators. 318-321 - Mohammad Javad Zavarei, Ehsan Kargaran, Hooman Nabovati:
Design of high gain CMOS LNA with improved linearity using modified derivative superposition. 322-325 - Akira Kondou, Masayuki Ikebe, Junichi Motohisa, Yoshihito Amemiya, Eiichi Sano:
A 0.6-4.5 GHz inductorless CMOS low noise amplifier with gyrator-C network. 326-329 - Paria Jamshidi, Sasan Naseh:
Wideband LNA with reactive feedback at the input matching network. 330-333 - Masoud Yavari, Sasan Naseh:
High efficiency class-E power amplifier with a new output network. 334-337 - Rodoula Makri, Petros Tsenes, Dimitrios Economou, Yannis Papananos, Dimitrios Dervenis, Michael K. Birbas, John C. Kikidis, Vassilis Paliouras, Grigorios Kalivas, Alexios N. Birbas, Panos Karaivazoglou, Yorgos Stratakos, John Korinthios, Stelios Siskos, Alkis A. Hatzopoulos, John Komninos, Serafeim Katsikas, Konstantinos N. Voudouris, Andreas Rigas, George Agapiou, Polivios Raxis:
Next generation millimeter wave backhaul radio: Overall system design for GbE 60GHz PtP wireless radio of high CMOS integration. 338-341 - Paschalis Simitsakis, Spyros Liolis, Dimitris Psyllos, Lampros Mountrichas, Paul P. Sotiriadis:
Design of a 1.2-V 60 GHz transceiver in a 90nm CMOS RF technology. 342-345 - Nikos Kanistras, Ioannis Tsatsaragkos, Ahmed Mahdi, Konstantina Karagianni, Vassilis Paliouras, Fotios Gioulekas, E. Lalos, Kostas Adaos, Michael K. Birbas, Panos Karaivazoglou, M. V. Koziotis, M. Perakis:
Digital baseband challenges for a 60GHz gigabit link. 346-349 - Fotis C. Plessas, Vasileios Panagiotopoulos, Vasilios Kalenteridis, George Souliotis, F. Liakou, Sotiris Koutsomitsos, Stilianos Siskos, Alexios N. Birbas:
A 60-GHz quadrature PLL in 90nm CMOS. 350-353 - Sylvain Maréchal, François Krummenacher, Maher Kayal:
CAD tools for fast analysis of parasitic coupling and mismatch effects in switched-capacitor circuits. 354-357 - Ghaith Bany Hamad, Otmane Aït Mohamed, Syed Rafay Hasan, Yvon Savaria:
SEGP-Finder: Tool for identification of Soft Error Glitch-Propagating paths at gate level. 358-361 - Badar K. Khan, Yaser M. A. Khalifa:
An evolutionary method for analog circuits optimization utilizing Mosfet-C filters. 362-365 - Yiming Li, Yi Li, Mingtian Zhou:
A greedy algorithm for wire length optimization. 366-369 - J. Bouloc, L. Nony, C. Loppacher, Wenceslas Rahajandraibe, F. Bocquet, Lakhdar Zaïd:
FPGA-based programmable digital PLL with very high frequency resolution. 370-373 - Paulo Da Cunha Possa, David Schaillie, Carlos Valderrama:
FPGA-based hardware acceleration: A CPU/accelerator interface exploration. 374-377 - Todd E. Schmuland, Mohsin M. Jamali, Matthew B. Longbrake, Peter E. Buxa:
CAD tool for parameterized FPGA based FFT architectures. 378-381 - Shervin Vakili, Diana Carolina Gil, J. M. Pierre Langlois, Yvon Savaria, Guy Bois:
Customized embedded processor design for global photographic tone mapping. 382-385 - John Hu, Brian Hu, Yanli Fan, Mohammed Ismail:
A 500 nA quiescent, 100 mA maximum load CMOS low-dropout regulator. 386-389 - Roberto M'Rad, Florent Morel, Gaël Pillonnet, Christian Vollaire, Angelo Nagari:
Conducted EMI prediction for integrated class D audio amplifier. 390-393 - Marc Pastre, François Krummenacher, Onur Kazanc, Naser Khosro Pour, Catherine Pace, Stefan Rigert, Maher Kayal:
A solar battery charger with maximum power point tracking. 394-397 - S.-E. Adami, Nicolas Degrenne, Christian Vollaire, Bruno Allard, François Buret, François Costa:
Autonomous ultra-low power DC/DC converter for Microbial Fuel Cells. 398-401 - Marco Zamprogno, Alberto Minuti, Francesca Girardi, Daniele Devecchi, Germano Nicollini:
1.05V on-request 10b General-Purpose ADC in 65nm digital CMOS technology. 402-405 - Jokin Segundo, Jesús Arias Álvarez, Luis Quintanilla, Lourdes Enríquez, Jesús Manuel Hernández-Mangas, José Vicente:
A parallel, CT-ΔΣ based ADC for OFDM UWB receivers in 130 nm CMOS. 406-409 - Diego Rossoni Mattos, Stéphane Gauffre, Patrick Hellmuth, Philippe Caïs, Jean-Louis Pedroza, Jean-Baptiste Bégueret, Alain Baudry:
Design of an 8Gsps, 65nm CMOS wideband flash ADC. 410-413 - Hossein Pakniat, Mohammad Yavari:
Dual quantization continuous time ΣΔ modulators with spectrally shaped feedback. 414-417 - Behzad Zeinali, Mohammad Yavari:
A new digital background correction algorithm with non-precision calibration signals for pipelined ADCs. 418-421 - Vikas Singal, Sami Smaili, Yehia Massoud:
Performance analysis of random demodulators with M-sequences and Kasami sequences. 422-425 - Mohammed Bahoura, Chan-Wang Park:
FPGA-implementation of high-speed MLP neural network. 426-429 - Ihsan Çiçek, Günhan Dündar:
A hardware efficient chaotic ring oscillator based true random number generator. 430-433 - Jin Fan:
Enhancing synchronizability of complex networks by community weakening. 434-437 - Mohammad S. Eslampanah Sendi, Mohammad Sharifkhani, Amir M. Sodagar:
CMOS-compatible structure for voltage-mode multiple-valued logic circuits. 438-441 - Jucemar Monteiro, José Luís Güntzel, Luciano Volcan Agostini:
A1CSA: An energy-efficient fast adder architecture for cell-based VLSI design. 442-445 - Sayyed Hasan Mozafari, Mahdi Fazeli, Shaahin Hessabi, Seyed Ghassem Miremadi:
A Low Cost circuit level fault detection technique to Full Adder design. 446-450 - Mohammad Javad Zavarei, Mohammad Reza Baghbanmanesh, Ehsan Kargaran, Hooman Nabovati, Abbas Golmakani:
Design of new full adder cell using hybrid-CMOS logic style. 451-454 - Osama Daifallah Al-Khaleel, Mohammad Al-Khaleel, Zakaria Al-Qudah, Christos A. Papachristou, Khaldoon Mhaidat, Francis G. Wolff:
Fast binary/decimal adder/subtractor with a novel correction-free BCD addition. 455-459 - Habib Ghasemizadeh Tamar, Akbar Ghasemizadeh Tamar, Khayrollah Hadidi, Abdollah Khoei, Pourya Hoseini:
High speed area reduced 64-bit static hybrid carry-lookahead/carry-select adder. 460-463 - Andrea Ajbl, Marc Pastre, Maher Kayal:
A fully integrated Hall sensor microsystem with current-mode output. 464-467 - Luigi Pinna, Giorgio Carlini, Lucia Seminara, Maurizio Valle:
Interface electronics for tactile sensing arrays. 468-471 - Hawraa Amhaz, Hassan Abbass, Hakim Zimouche, Gilles Sicard:
An improved smart readout technique based on temporal redundancies suppression designed for logarithmic CMOS image sensor. 472-475 - Leonardo Barboni, Maurizio Valle, Giorgio Carlini:
Smart readout design for tactile sensing devices. 476-479 - Marcelo Macchi da Silva, Jacobus W. Swart, Luiz Carlos Moreira, Wilhelmus A. M. Van Noije:
Current-mode motion detector sensor using copier cell in CMOS technology. 480-483 - Mehdi Terosiet, Sylvain Feruglio, Farouk Vallette, Patrick Garda, Olivier Romain, Julien Le Kernec:
A self-sufficient digitally controlled ring oscillator compensated for supply voltage variation. 484-487 - Hassene Kraimia, Thierry Taris, Jean-Baptiste Bégueret, Yann Deval:
A 2.4GHz ultra-low power current-reuse bleeding mixer with resistive feedback. 488-491 - Sleiman Bou-Sleiman, Mohammed Ismail:
Enabling efficient built-in-self-calibration for RFICs. 492-495 - Fumio Ozawa, Toru Taniguchi, Yasuhiro Toriyama, Jun Kobayashi, Kazuya Kojima:
Effective throughput 1 Gbps-class millimeter-wave wireless system. 496-499 - Kristian Gjertsen Kjelgård, Tor Sverre Lande:
A K-band UWB CMOS pulse-mode radar transmitter. 500-503 - Tahereh Sadeghpour, R. A. Abd-Alhameed, Nazar T. Ali, Issa T. E. Elfergani, Y. A. S. Dama, Ogbonnaya O. Anoh:
Linear and nonlinear crosstalk in MIMO OFDM transceivers. 504-507 - Y. A. S. Dama, Abubakar Sadiq Hussaini, R. A. Abd-Alhameed, Steve M. R. Jones, Neil J. McEwan, Tahereh Sadeghpour, Jonathan Rodriguez:
Envelope correlation formula for (N, N) MIMO antenna array including power losses. 508-511 - Abubakar Sadiq Hussaini, Raed A. Abd-Alhameed, Jonathan Rodriguez:
Tunable RF filters: Survey and beyond. 512-515 - Issa T. E. Elfergani, Raed A. Abd-Alhameed, Nazar T. Ali, A. G. Alhaddad, Chan H. See, E. H. Cabongomuqueba:
A novel dual band tunable balanced handset antenna for WLAN application. 516-519 - Yoann Congal, Mickael Cartron:
Memory controller for globally uncoordinated and locally coordinated checkpointing. 520-523 - Jinwook Jung, Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi, Masahiko Yoshimoto:
256-KB associativity-reconfigurable cache with 7T/14T SRAM for aggressive DVS down to 0.57 V. 524-527 - Xu Wang, Jianfei Jiang, Zhi-Gang Mao, Bingjing Ge, Xinglong Zhao:
A novel low power 64-kb SRAM using bit-lines charge-recycling and non-uniform cell scheme. 528-531 - Siamak Esmaeeli, Morteza Hosseini, Bijan Vosoughi Vahdat, Bizhan Rashidian:
A multi-bit error tolerant register file for a high reliable embedded processor. 532-537 - Panagiotis Sismanoglou, Dimitris Nikolos:
Test data compression based on the reuse of parts of the dictionary entries. 538-541 - Eberle A. Rambo, Olav P. Henschel, Luiz C. V. dos Santos:
Automatic generation of memory consistency tests for chip multiprocessing. 542-545 - Mahdi Zare, Shaahin Hessabi, Maziar Goudarzi:
Efficient periodic clock calculus in latency-insensitive design. 546-549 - Ali Kokhazadeh, Omid Fatemi:
Design space pruning of MPSoCs using weighted sub-sampling. 550-553 - Mohamad Adnan Al-Alaoui:
Novel FIR approximations of IIR differentiators with applications to image edge detection. 554-558 - Firas Hassan, Sami Khorbotly:
Recursive implementation of exponential linear phase FIR filters. 559-562 - Hassan A. Salamy:
Compact code generation for embedded applications on digital signal processors. 563-566 - Sidinei Ghissoni, Eduardo Costa, José Monteiro, Ricardo Reis:
Combination of constant matrix multiplication and gate-level approaches for area and power efficient hybrid radix-2 DIT FFT realization. 567-570 - Ye Zhang, Niklas Zimmermann, Ralf Wunderlich, Stefan Heinen:
A wide-frequency-range fractional-N synthesizer for clock generation in 65nm CMOS. 571-574 - Mohamad Reza Nazemi, Hossein Shamsi, Saeed Mehregan:
Design and simulation of a switched capacitor ladder filter in a 90nm CMOS technology for WiMAX applications. 575-578 - Ahmed Rashed Kulaib, Raed M. Shubair, Mahmoud Al-Qutayri, Jason W. P. Ng:
Performance evaluation of linear and circular arrays in wireless sensor network localization. 579-582 - Mokhtar Tormos, Camel Tanougast, Abbas Dandache, Pierre Bretillon, Pierre Kasser:
Performance evaluation of distributed Tarokh SFBC and Alamouti MISO for SFN DVB-T2 broadcast networks. 583-586 - Lina S. Mohjazi, Mahmoud Al-Qutayri, Hassan R. Barada, Kin Fai Poon:
Performance evaluation of heuristic techniques for coverage optimization in femtocells. 587-590 - Ali Reza Dehqan, Khalil Mafinezhad, Ehsan Kargaran, Hooman Nabovati:
Design of low voltage low power dual-band LNA with forward body biasing technique. 591-594 - Abdol-Hamid Zaker, Hossein Shamsi, Saeed Gholami, Mahdi Pourshamsaiee:
Design of a CMOS LNA for the upper band of UWB receivers. 595-598 - Masoud Rezaei, Hassan Sepehrian, Sasan Naseh:
A new scheme of coupling VCOs for the purpose of injection locking frequency divider. 599-602 - Masoud Yavari, Sasan Naseh:
The effect of ground bond-wire on the performance of CMOS class-E power amplifiers. 603-606 - Sanad Bushnaq, Makoto Ikeda, Kunihiro Asada:
All-digital 400∼900 MHz power amplifier consuming 0.03 mW/MHz using 0.18 μm CMOS. 607-610 - Somaye Asadian, Mohammad Jafar Hemmati, Sasan Naseh:
A low power 9GHz divide-by-3 injection locked frequency divider in 0.18μm CMOS with 15% locking range. 611-614 - Achraf Mallat, Pierre Gérard, Luc Vandendorpe:
Multi-user time-hopping IR-UWB generator based on FPGA with high-speed serial module. 615-618 - Raafat Lababidi, Dominique Lo Hine Tong, Ali Louzir, Jean-Luc Robert, Jean-Yves Le Naour, Julien Lintignat, Bernard Jarry, Bruno Barelaud:
Tunable low-pass active filter using active capacitor for multimode standards. 619-622 - Amirhossein Ansari, Mohammad Yavari:
A very wideband low noise amplifier for cognitive radios. 623-626 - Rosario Arjona, Iluminada Baturone:
A digital circuit for extracting singular points from fingerprint images. 627-630 - Bassam Moslem, Mohamad Khalil, Mohamad O. Diab, Aly Chkeir, Catherine Marque:
Combining multiple support vector machines for boosting the classification accuracy of uterine EMG signals. 631-634 - Pourya Hoseini, Abdollah Khoei, Khayrollah Hadidi, Sajjad Moshfe:
Fast and flexible genetic algorithm processor. 635-638 - Raouf Fareh, Maarouf Saad, Abdelkrim Brahmi, Mohamad R. Saad:
Real time tracking trajectory in workspace for ANAT robot manipulator using hierarchical control. 639-642 - Walid Bouallegue, Salma Bouslama Bouabdallah, Moncef Tagina:
A new adaptive fuzzy FDI method for Bond Graph uncertain parameters systems. 643-648 - Prakash Harikumar, Anu Kalidas Muralidharan Pillai, J. Jacob Wikner:
A study on switched-capacitor blocks for reconfigurable ADCs. 649-652 - Celine Azar, Stéphane Chevobbe, Yves Lhuillier, Jean-Philippe Diguet:
Dynamic routing strategy for embedded distributed architectures. 653-656 - Kamal Baraka, Eric Kerherve, Jean-Marie Pham, Moustapha El Hassan:
Controlling the bandwidth of Bulk Acoustic Wave filter using a decoder designed on 65nm process. 657-660 - Anass Samir, Edith Kussener, Wenceslas Rahajandraibe, Ludovic Girardeau, Yannick Bert, Hervé Barthélemy:
A 90-nm CMOS resistor-free compact trimmable voltage reference for ultra-low power low cost applications. 661-664 - Aurélien Gonzalez, Jean-Marie Codol, Michel Devy:
A C-embedded algorithm for real-time monocular SLAM. 665-668 - Bekkouche Djamal-Dine, Hakiki Khalid, Bouhamida Mohammed, Benabdellah Tewfik:
A non-linear control of electric vehicle driven by induction motors. 669-672 - David A. Marquez-Gamez, Michel Devy:
Visual navigation of communicating vehicles in unknown and changing environment. 673-676 - Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux:
High performance 4: 1 multiplexer with ambipolar double-gate FETs. 677-680 - Jacques Laurent Athow, Côme Rozon, Dhamin Al-Khalili, J. M. Pierre Langlois:
A CNFET-based characterization framework for digital circuits. 681-684 - Charly Bechara, Aurelien Berhault, Nicolas Ventroux, Stéphane Chevobbe, Yves Lhuillier, Raphaël David, Daniel Etiemble:
A small footprint interleaved multithreaded processor for embedded systems. 685-690 - Susana Eiroa, Iluminada Baturone:
Circuit authentication based on Ring-Oscillator PUFs. 691-694 - Vladimir Petrovic, Günter Schoof, Sergio Montenegro:
Middleware switch ASIC implementation. 695-698 - Christian Mugliette, Ivan Grech, Owen Casha, Edward Gatt, Joseph Micallef:
FPGA active digital cochlea model. 699-702 - Hisham El-Masry, Dhamin Al-Khalili:
Cell stack length using an enhanced logical effort model for a library-free paradigm. 703-706 - Cédric Killian, Camel Tanougast, Fabrice Monteiro, Abbas Dandache:
Strategic placement of reliable routers for the optimization of dependable dynamic NoC. 707-710 - Ji Qiu, Xiang Gao, Yifei Jiang, Xu Xiao:
An ultra-fast hybrid simulation framework for ASIP. 711-714 - Filippos Toufexis, Antonis Papanikolaou, Dimitrios Soudris, George I. Stamoulis, Sotiris Bantas:
Power, performance and area prediction of 3D ICs during early stage design exploration in 45nm. 715-718 - Emilio Wuerges, Rômulo Silva de Oliveira, Luiz C. V. dos Santos:
Fast estimation of memory consumption for energy-efficient compilers. 719-722 - Marco Giammarini, Massimo Conti, Simone Orcioni:
System-level energy estimation with Powersim. 723-726 - Houman Zarrabi, A. J. Al-Khalili, Yvon Savaria:
Activity management in battery-powered embedded systems: A case study of ZigBee® WSN. 727-731 - Martin Dubois, Mounir Boukadoum:
Rules class approach to scheduling algorithms. 732-735 - João Paulo Pizani Flor, Tiago Rogério Mück, Antônio Augusto Fröhlich:
High-level design and synthesis of a resource scheduler. 736-739 - Gerson Scartezzini, Ricardo Reis:
Power consumption in transistor networks versus in standard cells. 740-743 - Marwan A. Jaber, Daniel Massicotte, Youssef Achouri:
A higher radix FFT FPGA implementation suitable for OFDM systems. 744-747 - Calliope-Louisa Sotiropoulou, Spiridon Nikolaidis:
ILP formulation for hybrid FPGA MPSoCs optimizing performance, area and memory usage. 748-751 - Efstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, George Economakos, Dimitrios Soudris:
Design and experimentation with low-power morphable multipliers. 752-755 - Abu Asaduzzaman, Fadi N. Sibai, Abdullah A. Abonamah:
A dynamic way cache locking scheme to improve the predictability of power-aware embedded systems. 756-759 - Karl Leboeuf, Iman Makaremi, Roberto Muscedere, Majid Ahmadi:
Image processing technique for segmenting microstructural porosity of laser-welded thermoplastics. 760-763 - Nadine Abdallah, Audrey Queudet, Maryline Chetto, Rafic Hage Chehade:
Partitioned EDF scheduling in multicore systems with quality of service constraints. 764-767 - Maissa Abdallah, Maryline Chetto, Audrey Queudet, Rafic Hage Chehade:
Quality of service facilities for firm real-time energy harvesting systems. 768-771 - Mohammad Habibur Rahman, Thierry Kittel-Ouimet, Maarouf Saad, Jean-Pierre Kenné, Philippe S. Archambault:
Nonlinear control of an upper-limb exoskelton robot. 772-775 - Hussein El Ghor, Maryline Chetto, Rafic Hage Chehade:
EH-EDF: An on-line scheduler for real-time energy harvesting systems. 776-779 - Gilbert Kowarzyk, Normand Bélanger, Yvon Savaria:
A GPGPU-based software implementation of the PBDI deinterlacing algorithm. 780-783 - Yosra Mlayeh, Fatma Rouissi, Fethi Tlili, Adel Ghazel:
Performances of switching algorithm methods in MIMO-OFDM systems. 784-787 - Diego A. Botero Galeano, Michel Devy, Jean-Louis Boizard, Wassim Filali:
Real-time architecture on FPGA for obstacle detection using inverse perspective mapping. 788-791 - Sajjad Moshfe, Abdollah Khoei, Khayrollah Hadidi:
A highly accurate fully programmable fuzzifier in current mode approach. 792-795
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-01-10 18:41 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
