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A Real-Time Full Architecture for AVS Motion Estimation
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由 L Deng 著作2007被引用 4 次 — This architecture has two 2-D systolic arrays and fully supports the AVS variable block size match. It is able to process forward, backward and symmetric ...
A Real-Time Full Architecture for AVS Motion Estimation
IEEE Xplore
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IEEE Xplore
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(AVS), the motion estimation employs many new techniques such as variable block size, multiple reference frames, motion.
A Real-Time Full Architecture for AVS Motion Estimation.
BibSonomy
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A Real-Time Full Architecture for AVS Motion Estimation. L. Deng, X. Xie, and W. Gao. IEEE Trans. Consumer Electron., 53 (4): 1744-1751 (2007 ). 2. 3 ...
An Efficient Fractional Motion Estimation Architecture for AVS ...
先进人机通信技术联合实验室
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先进人机通信技术联合实验室
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Abstract — Fractional motion estimation (FME) as a complement to integer motion estimation (IME) conducts higher compression rate in video coding.
基于AVS高清编码器IME算法设计和实现
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中国光学期刊网
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[12] DENG Lei,XIE Xiaodong,GAO Wen. A real-time full architecture for AVS motion estimation［J］. IEEE Transactions on Consumer Electronics, 2007,53(4):1744 ...
An efficient fractional motion estimation architecture for avs real- ...
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An efficient FME algorithm and architecture that significantly reduce the number of the candidate sub-pixels by predicting quarter motion vector and cost ...
A High Efficient Architecture for Motion Estimation Based on AVC ...
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In the new video compression standards, AVC and AVS, the motion estimation adopts many new features such as variable block size searching, ...
A Highly Efficient Mode Decision Algorithm and ...
视频与视觉技术国家工程研究中心
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视频与视觉技术国家工程研究中心
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Our proposed mode decision architecture can support the real time processing of 1080P@30fps. Keywords- inter mode decision, AVS, Sobel operator, visual.
An efficient fractional motion estimation architecture for avs ...
R Discovery
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R Discovery
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2012年7月1日 — In this paper, we propose an efficient FME algorithm and architecture that significantly reduce the number of the candidate sub-pixels by ...
An Efficient VLSI Architecture for Motion Compensation of ...
中国科学院计算技术研究所
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中国科学院计算技术研究所
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由 JH Zheng 著作2006被引用 16 次 — When MV FIFO is half full, the writing request is sent out to inform DDR controller and then the data are read from MV FIFO successively, at the same time,.