I'm excited to celebrate my two-year work anniversary at Edveon Technologies in the world of semiconductors!
The past year has been incredibly exciting and full of learning. I started with an exposure to cache memory, where I found the verification process both challenging and rewarding. I read the specification, owned a V-plan, and successfully completed a milestone in the project.
I learned the UCIe protocol before starting the next project, which added to my understanding of interconnects and data transfer standards.
Next, I worked on an AI chip, a data-processing chip where I learned a lot. Initially, I started as a verification engineer, but eventually, I took on responsibility for the RTL code for a sub-system. I owned three blocks and, with a solid V-plan and a great team, completed its verification. I also handled LINT and CDC checks using JasperGold, performed connectivity checks, and verified PADs. This project gave me significant clarity about chip design.
After functional verification, I worked on GLS, setting up the testbench and running GLS in all corners. The project concluded with the chip being taped out, and I got to see the entire process, including LEC, STA, DRC, and LVS, running in parallel.
I was honored to receive the Star of the Quarter award for Q3 2024 during this time.
As my curiosity about chips grew, I developed an interest in DFT. I attended an interview for a DFT role via Edveon and am excited to start this new journey.
Thank you, Viswa Krishnamurthi, for helping me understand chips, and Vinod Kumar Gopinath, for helping me strengthen my programming skills. Special thanks to my batch, "PACERS", my project team, "UNIQUE-3 TEAM", and all my colleagues for their incredible support throughout this journey.
Looking forward to achieving many more milestones like this!