[en] The nSYNC chip is a radiation tolerant custom ASIC, developed in UMC 130 nm technology, and the main component of the new readout electronics for the LHCb Muon Detector Upgrade. The nSYNC has been developed in order to implement all the required functionalities for the readout upgrade in terms of timing alignment and measurements, and equipped also with control and monitoring features. The internal architecture of the chip, the data flow and test results on different nSYNC functionalities are presented.

[en] A method is described which allows to deduce the dead-time of the front-end electronics of the LHCb muon detector from a series of measurements performed at different luminosities at a bunch-crossing rate of 20 MHz. The measured values of the dead-time range from ∼ 70 ns to ∼ 100 ns. These results allow to estimate the performance of the muon detector at the future bunch-crossing rate of 40 MHz and at higher luminosity

[en] The muon detector of LHCb, which comprises 1368 multi-wire-proportional-chambers (MWPC) for a total area of 435 m², is the largest instrument of its kind exposed to such a high-radiation environment. In nine years of operation, from 2010 until 2018, we did not observe appreciable signs of ageing of the detector in terms of reduced performance. However, during such a long period, many chamber gas gaps suffered from HV trips. Most of the trips were due to Malter-like effects, characterised by the appearance of local self-sustained high currents, presumably originating from impurities induced during chamber production. Very effective, though long, recovery procedures were implemented with a HV training of the gaps in situ while taking data. The training allowed most of the affected chambers to be returned to their full functionality and the muon detector efficiency to be kept close to 100%. The possibility of making the recovery faster and even more effective by adding a small percentage of oxygen in the gas mixture has been studied and successfully tested.