[en] Graphical abstract: The crystal structure modulation and continuous tenability in band gap were achieved in the Zn_1_−_xNi_xWO_4 (0 ⩽ x ⩽ 1) full range solid solution. - Highlights: • A novel Zn_1_−_xNi_xWO_4 (0 ⩽ x ⩽ 1) solid solution was synthesized by a two-step method. • They all present a single-phase in the wolframite structure with space group P2/c. • The continuous tenability in band gap was achieved in Zn_1_−_xNi_xWO_4 (0 ⩽ x ⩽ 1). • NiWO_4 and Zn_0_._5Ni_0_._5WO_4 exhibit paramagnetic behavior and obey the Curie–Weiss law. - Abstract: A novel Zn_1_−_xNi_xWO_4 (0 ⩽ x ⩽ 1) solid solution with full compositions range has been successfully developed by a hydrothermal–annealing method for the first time. The crystal structure was characterized by X-ray diffraction (XRD), Fourier-transform infrared (FTIR) spectra and scanning electron microscopy (SEM). It was found that the entire range of compositions display a single-phase in the wolframite structure with a symmetry P2/c. The diffuse reflection spectroscopy (DRS) measurements on Zn_1_−_xNi_xWO_4 (0 ⩽ x ⩽ 1) indicated that the optical band gap size across the solid solution exhibits red-shifts from 2.8 eV to 1.63 eV for indirect transition and 3.56 eV to 2.77 eV for direct transition with the increase of Ni"2"+ content. As deduced from the magnetic susceptibility measurements on NiWO_4 and Zn_0_._5Ni_0_._5WO_4, they are paramagnetic and obey the Curie–Weiss law. Moreover, their effective magnetic moments are determined to be 9.96μ_B and 6.45μ_B, respectively

[en] Graphical abstract: The efficient charge transfer occurred at the interface of BiIO_4/Bi_2MoO_6 heterojunction results in the efficient separation of photoexcited electron–hole pairs and promotes the photocatalytic activity. - Highlights: • BiIO_4/Bi_2MoO_6 composites were synthesized by a one-step hydrothermal method. • The BiIO_4/Bi_2MoO_6 composite exhibits much better photoelectrochemical performance. • The highly improved photocatalytic activity is attributed to heterojunction structure. • Holes (h"+) are the main active species in the photodegradation process of RhB. - Abstract: A novel BiIO_4/Bi_2MoO_6 heterojunction photocatalyst has been successfully developed by a one-step hydrothermal method for the first time. It was characterized by X-ray diffraction (XRD), scanning electron microscopy (SEM), and diffuse reflection spectroscopy (DRS). Compared to pure BiIO_4 and Bi_2MoO_6, the BiIO_4/Bi_2MoO_6 composite exhibits the much better photoelectrochemical performance for Rhodamine B (RhB) degradation and photocurrent (PC) generation under visible light irradiation (λ > 420 nm). This enhancement on visible-light-responsive photocatalytic activity should be attributed to the fabrication of a BiIO_4/Bi_2MoO_6 heterojunction, thus resulting in the high separation and transfer efficiency of photogenerated charge carriers. The supposed photocatalytic mechanism dominated by holes (h"+) was verified by the photoluminescence (PL) spectroscopy, electrochemical impedance spectra (EIS) and active species trapping experiments

[en] This paper presents a power-efficient 100-MS/s, 10-bit asynchronous successive approximation register (SAR) ADC. It includes an on-chip reference buffer and the total power dissipation is 6.8 mW. To achieve high performance with high power-efficiency in the proposed ADC, bootstrapped switch, redundancy, set-and-down switching approach, dynamic comparator and dynamic logic techniques are employed. The prototype was fabricated using 65 nm standard CMOS technology. At a 1.2-V supply and 100 MS/s, the ADC achieves an SNDR of 56.2 dB and a SFDR of 65.1 dB. The ADC core consumes only 3.1 mW, resulting in a figure of merit (FOM) of 30.27 fJ/conversionstep and occupies an active area of only 0.009 mm². (paper)

[en] Highlights: • The bending modes of hydrated protons in Nafion membranes are studied with fs mid-IR. • The vibrational relaxation is ultrafast (170 ± 30 fs) and leads to local heating. • The dissipated energy thermalizes over Nafion with a time constant of 1.5 ps. • For ∼10 We study the vibrational dynamics of the bending mode at 1730 cm⁻¹ of proton hydration structures in Nafion membranes with polarization-resolved infrared (IR) pump-probe spectroscopy. The bending mode relaxes to an intermediate state with a time constant T₁ of 170 ± 30 fs. Subsequently, the dissipated energy equilibrates with ${\text{T}}_{\mathit{eq}}$ of 1.5 ± 0.2 ps. The transient absorption signals show a long-living anisotropy, which indicates that for part of the excited proton hydration clusters the vibrational energy dissipation results in a local structural change, e.g. the breaking of a local hydrogen bond. This structural relaxation relaxes with a time constant of 38 ± 4 ps.

[en] This paper shows the design of a second-order multi-bit ΔΣ modulator with hybrid structure for ADSL applications. A modified two phase non-overlapping clock generator is designed to let PH2 borrow 12% of the time from PH1, which relaxes the speed of OTAs, comparators and the DEM block. The clock feed through problem of the passive adder is solved by revising the timing of the comparators and the adder. The chip is designed and fabricated in UMC 0.18 μm CMOS technology. Measurement results show that with an oversampling ratio of 32 and a clock rate of 80 MHz, the modulator can achieve 79 dB dynamic range, 71.3 dB SNDR, 11 mW power consumption from a 1.8 V power supply. The FOM is 1.47 pJ/step.

[en] This paper presents a 12-bit column-parallel successive approximation register analog-to-digital converter (SAR ADC) for high-speed CMOS image sensors. A segmented binary-weighted switched capacitor digital-to-analog converter (CDAC) and a staggered structure MOM unit capacitor is used to reduce the ADC area and to make its layout fit double pixel pitches. An electrical field shielding layout method is proposed to eliminate the parasitic capacitance on the top plate of the unit capacitor. A dynamic power control technique is proposed to reduce the power consumption of a single channel during readout. An off-chip foreground digital calibration is adopted to compensate for the nonlinearity due to the mismatch of unit capacitors among the CDAC. The prototype SAR ADC is fabricated in a 0.18 μm 1P5M CIS process. A single SAR ADC occupies 20 × 2020 μm"2. Sampling at 833 kS/s, the measured differential nonlinearity, integral nonlinearity and effective number of bits of SAR ADC with calibration are 0.9/−1 LSB, 1/−1.1 LSB and 11.24 bits, respectively; the power consumption is only 0.26 mW under a 1.8-V supply and decreases linearly as the frame rate decreases. (semiconductor integrated circuits)

[en] A 12-bit intrinsic accuracy digital-to-analog converter integrated into standard digital 0.18 μm CMOS technology is proposed. It is based on a current steering segmented 6+6 architecture and requires no calibration. By dividing one most significant bit unary source into 16 elements located in 16 separated regions of the array, the linear gradient errors and quadratic errors can be averaged and eliminated effectively. A novel static performance testing method is proposed. The measured differential nonlinearity and integral nonlinearity are 0.42 and 0.39 least significant bit, respectively. For 12-bit resolution, the converter reaches an update rate of 100 MS/s. The chip operates from a single 1.8 V voltage supply, and the core die area is 0.28 mm². (semiconductor integrated circuits)

[en] This paper presents an image sensor controller that is compatible for depth measurement, which is based on the continuous-wave modulation time-of-flight technology. The image sensor controller is utilized to generate reconfigurable control signals for a 256 × 256 high speed CMOS image sensor with a conventional image sensing mode and a depth measurement mode. The image sensor controller generates control signals for the pixel array to realize the rolling exposure and the correlated double sampling functions. An refined circuit design technique in the logic level is presented to reduce chip area and power consumption. The chip, with a size of 700 × 3380 μm"2, is fabricated in a standard 0.18 μm CMOS image sensor process. The power consumption estimated by the synthesis tool is 65 mW under a 1.8 V supply voltage and a 100 MHz clock frequency. Our test results show that the image sensor controller functions properly. (semiconductor integrated circuits)

[en] This paper presents a 1.1 mW 87 dB dynamic range third order Δ σ modulator implemented in 0.18 μm CMOS technology for audio applications. By adopting a feed-forward multi-bit topology, the signal swing at the output of the first integrator can be suppressed. A simple current mirror single stage OTA with 34 dB DC gain working under 1 V power supply is used in the first integrator. The prototype modulator achieves 87 dB DR and 83.8 dB peak SNDR across the bandwidth from 100 Hz to 24 kHz with 3 kHz input signal. (semiconductor integrated circuits)

[en] A power efficient 8-bit successive approximation register (SAR) A/D for the vital sign monitoring of a wireless body sensor network (WBSN) is presented. A charge redistribution architecture is employed. The prototype A/D is fabricated in 0.18 μm CMOS. The A/D achieves 7.5 ENOB with sampling rate varying from 64 kHz to 1.5 MHz. The power consumption varies from 10.8 to 225.7 μW. (semiconductor integrated circuits)