Tokinori Kozawa - researchr alias

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Viewing Publication 1 - 18 from 18

2003

Roles of funding agencies in technology-driven economic developmentKazuo Nakajima, Brian Schott, Tokinori Kozawa, Jose L. Muñoz, Wolfgang Rosenstiel, Sakae Takahashi, Chen-Wen Wu. aspdac 2003: 547 [doi]

1997

Collaboration between university and industryTokinori Kozawa. aspdac 1997: 433 [doi]

1991

Basic Concepts of Timing-oriented Design Automation for High-performance Mainframe ComputersHidekazu Terai, Fumio Goto, Katsuro Wakai, Tokinori Kozawa, Mitsugu Edagawa, Satoshi Hososaka, Masahiro Hashimoto. dac 1991: 193-198 [doi]

1988

Automatic Layout Procedures for Serial Routing DevicesYasushi Ogawa, Hidekazu Terai, Tokinori Kozawa. dac 1988: 642-645 [doi]

1987

RFSIM: Reduced Fault SimulatorTakao Nishida, Shunsuke Miyamoto, Tokinori Kozawa, Katsuya Satoh. tcad, 6(3):392-402, 1987. [doi]

A concurrent pattern operation algorithm for VLSI mask dataAkira Tsukizoe, Tokinori Kozawa, Jun'ya Sakemi, Chihei Miura, Tatsuki Ishii. scjapan, 18(2):98-108, 1987. [doi]

1986

Efficient placement algorithms optimizing delay for high-speed ECL masterslice LSIsYasushi Ogawa, Tatsuki Ishii, Yoichi Shiraishi, Hidekazu Terai, Tokinori Kozawa, Kyoji Yuyama, Kyoji Chiba. dac 1986: 404-410 [doi]

Principles of design automatioon system for very large scale computer designYasuhiro Ohno, Masayuki Miyoshi, Norio Yamada, Toshihiko Odaka, Tokinori Kozawa, Kooichiro Ishihara. dac 1986: 354-359 [doi]

1985

Research in Design Automation for VLSI LayoutTokinori Kozawa, Hidekazu Terai. dt, 2(5):43-53, 1985. [doi]

A routing procedure for mixed array of custom macros and standard cellsHidekazu Terai, Michiyoshi Hayase, Tokinori Kozawa. dac 1985: 503-508 [doi]

1984

Combine and top down block placement algorithm for hierarchical logic VLSI layoutTokinori Kozawa, Chihei Miura, Hidekazu Terai. dac 1984: 667-669 [doi]

1983

Automatic placement algorithms for high packing density V L S ITokinori Kozawa, Hidekazu Terai, Tatsuki Ishii, Michiyoshi Hayase, Chihei Miura, Yasushi Ogawa, Kuniaki Kishida, Norio Yamada, Yasuhiro Ohno. dac 1983: 175-181 [doi]

MACH : a high-hitting pattern checker for VLSI mask dataAkira Tsukizoe, Jun'ya Sakemi, Tokinori Kozawa, Hiroshi Fukuda. dac 1983: 726-731 [doi]

1981

1975

A logic partitioning procedure by interchanging clustersTadakatsu Ishiga, Tokinori Kozawa, Shoji Sato. dac 1975: 369-377 [doi]

1974

Advanced LILAC - an Automated Layout Generation system for MOS/LSIsTokinori Kozawa, Hiroshi Horino, Tadakatu Ishiga, Jun'ya Sakemi, Shoji Sato. dac 1974: 26-46 [doi]

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