Maximizing Side Channel Attack-Resistance and Energy-Efficiency of the STTL Combining Multi-Vt Transistors with Current and Capacitance Balancing

Vitor G. Lima, Guilherme Paim, Leandro M. G. Rocha, Leomar da Rosa, Felipe S. Marques, Eduardo A. C. da Costa, Vinicius V. Camargo, Rafael Soares, Sergio Bampi. Maximizing Side Channel Attack-Resistance and Energy-Efficiency of the STTL Combining Multi-Vt Transistors with Current and Capacitance Balancing. In IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019. pages 1-5, IEEE, 2019. [doi]

Abstract

Abstract is missing.

  翻译: