Ping Lu, Pietro Andreani, Antonio Liscidini. A 90nm CMOS gated-ring-oscillator-based Vernier time-to-digital converter for DPLLs. In Proceedings of the 37th European Solid-State Circuits Conference, ESSCIRC 2011, Helsinki, Finland, Sept. 12-16, 2011. pages 459-462, IEEE, 2011. [doi]
Abstract is missing.