Table of Contents

• A low-power CMOS analog voltage buffer using compact adaptive biasingChutham Sawigun, Jirayuth Mahattanakul, Andreas Demosthenous, Dipankar Pal. 1-4 [doi]
• 3.125 Gb/s temperature compensated CMOS optical preamplifier with automatic gain controlJose Maria Garcia del Pozo, Santiago Celma, Maria Teresa Sanz, Juan Pablo Alegre. 5-8 [doi]
• Low-voltage low-power 200MHz variable gain amplifier in CMOS 0.35μmJuan Pablo Alegre, Santiago Celma, Belén Calvo, Aránzazu Otín. 9-12 [doi]
• CMOS voltage feedback current amplifierGiuseppe Di Cataldo, Alfio Dario Grasso, Salvatore Pennisi. 13-15 [doi]
• A rail-to-rail op amp for VLSI cell with constant performanceXian Li, Changyuan Chang, Juan Li. 16-19 [doi]
• Automated synthesis of complex analog circuitsGeorges G. E. Gielen, Tom Eeckelaert, Ewout Martens, Trent McConaghy. 20-23 [doi]
• EDA for RF and analog front-ends in the 4G era: Challenges and solutionsDelia Rodríguez de Llera Gonzalez, Ana Rusu, Mohammed Ismail. 24-27 [doi]
• Pareto optimization of analog circuits considering variabilityHelmut Graeb, Daniel Mueller, Ulf Schlichtmann. 28-31 [doi]
• An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC designManuel F. M. Barros, Jorge Guilherme, Nuno Horta. 32-35 [doi]
• New layout generator for analog CMOS circuitsEnder Yilmaz, Günhan Dündar. 36-39 [doi]
• CMOS continuous-time CMFB circuit with improved linearityJuan M. Carrillo, José L. Ausín, J. Francisco Duque-Carrillo. 40-43 [doi]
• A very compact KHN filter with multidecade tuningCarlos Muñiz-Montero, Alejandro Díaz-Sánchez, Ramón González Carvajal. 44-47 [doi]
• A 1V low power sigma-delta modulator based on floating gate MOS transistorsMin Xu, Esther Rodríguez-Villegas. 48-51 [doi]
• Class AB fully differential voltage followersJaime Ramírez-Angulo, Antonio Lopez-Martin, Ramón G. Carvajal, Belén Calvo. 52-55 [doi]
• Low-voltage FGMOS-based balanced current scaling in moderate inversionAntonio J. López-Martín, Jaime Ramírez-Angulo, Ramón G. Carvajal. 56-59 [doi]
• Technology-caused performance limitation of the common-gate LNAThomas Stucke, Rainer Kokozinski, Stephan Kolnsberg, Bedrich J. Hosticka. 60-63 [doi]
• Analysis and design of common-gate low-noise amplifier for wideband applicationsJouni Kaukovuori, Mikko Kaltiokallio, Jussi Ryynänen. 64-67 [doi]
• Analysis of different feedback topologies to LNA input matchingMikko Kaltiokallio, Jouni Kaukovuori, Jussi Ryynänen. 68-71 [doi]
• A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technologyDavide Brandano, Manuel Delgado-Restituto, Jesús Ruiz-Amaya, Ángel Rodríguez-Vázquez. 72-75 [doi]
• A comparative study of CMOS LNAsSherif Ahmed Saleh Mohamed, Maurits Ortmanns, Yiannos Manoli. 76-79 [doi]
• Practical limitations to the implementation of resistive grid filtering in Cellular Neural NetworksJorge Fernández-Berni, Ricardo Carmona-Galán. 80-83 [doi]
• Implementation of an asynchronous cellular logic network as a co-processor for a general-purpose massively parallel arrayAlexey Lopich, Piotr Dudek. 84-87 [doi]
• Verification of Split&Shift techniques for CNN hardware reductionNatalia A. Fernandez-Garcia, Jordi Albo-Canals, Victor M. Brea, Jordi Riera-Babures, Diego Cabello, Xavier Vilasís-Cardona. 88-91 [doi]
• Relating Cellular Non-linear Networks to Threshold Logic and Single Instruction Multiple Data computing modelsVictor M. Brea, Mika Laiho, Natalia A. Fernandez-Garcia, Ari Paasio, Diego Cabello. 92-95 [doi]
• High resolution analog interface for micromachined capacitive accelerometerLasse Aaltonen, Pasi Rahikkala, Mikko Saukoski, Kari Halonen. 96-99 [doi]
• Design and control of a micro-cantilever tool for micro-robot contact sensingAnna Arbat, Joan Canals, Raimon Casanova, Ángel Dieguez, Jordi Brufau, M. Puig, Josep Samitier. 100-103 [doi]
• A nanopower double-mode 1-V frequency reference for an ultra-low-power capacitive sensor interfaceMatti Paavola, Mikko Saukoski, Mika Laiho, Kari Halonen. 104-107 [doi]
• A low power capacitance to pulse width converter for integrated sensorsPaolo Bruschi, Nicolò Nizza, Michele Dei, G. Barillaro. 108-111 [doi]
• A simplified modeling approach for a MEMS capacitive sensorSyed Arsalan Jawed, Davide Cattin, Nicola Massari, Massimo Gottardi, Benno Margesin, Andrea Baschirotto. 112-115 [doi]
• LDO compensation strategy based on current buffer/amplifiersGianluca Giustolisi, Gaetano Palumbo, Ester Spitale. 116-119 [doi]
• Compensated circuit for Low Dropout Regulator having stable load regulation after consideration of bonding wire resistanceSocheat Heng, Cong-Kha Pham. 120-123 [doi]
• A programmable switched-capacitor relaxation oscillator with low phase jitterJosé L. Ausín, J. Ramos, Juan F. Duque-Carillo, Guido Torelli. 124-127 [doi]
• Compensation method of amplitude error in sawtooth wave generatorNobukazu Takai, Yukihiro Fujimura. 128-131 [doi]
• Design of a multimode reconfigurable sigma-delta converter for 4G wireless receiversArtur Silva, Nuno Horta, Jorge Guilherme. 132-135 [doi]
• Novel topologies of cascade ΣΔ modulators for low-voltage wideband applicationsAlonso Morgado, Rocío Del Río, José Manuel de la Rosa. 136-139 [doi]
• A compensation method of the excess loop delay in continuous-time complex sigma-delta modulatorsSong-Bok Kim, Stefan Joeres, Stefan Heinen. 140-143 [doi]
• Accurate and simple modeling of amplifier dc gain nonlinearity in switched-capacitor circuitsMohammad Yavari, Ángel Rodríguez-Vázquez. 144-147 [doi]
• Reduction of simultaneous switching noise in analog signal bandErik Backenius, Mark Vesterbacka, V. B. Settu. 148-151 [doi]
• Power supply noise and logic error probabilityDennis Andrade, Ferran Martorell, Marc Pons, Francesc Moll, Antonio Rubio. 152-155 [doi]
• A switching noise vision of the optimization techniques for low-power synthesisJavier Castro-Ramirez, Pilar Parra, Manuel Valencia, Antonio J. Acosta. 156-159 [doi]
• Effects of digital switching noise on analog circuits performanceGiorgio Boselli, Gabriella Trucco, Valentino Liberali. 160-163 [doi]
• Applications of Programmable Microwave Function Array (PROMFA)Naveed Ahsan, Aziz Ouacha, Carl Samuelsson, Tomas Boman. 164-167 [doi]
• Multiband direct RF-sampling receiver front-end for WLAN in 0.13 μm CMOSStefan Back Andersson, Rashad Ramzan, Jerzy J. Dabrowski, Christer Svensson. 168-171 [doi]
• Flexible ADCs for wireless mobile radiosAna Rusu, Martin Gustafsson 0002, Delia Rodríguez de Llera Gonzalez, Mohammed Ismail. 172-175 [doi]
• A RF front-end for digital audio broadcastingHsiao Wei Su, Yi Ke Cui, Bao Yong Chi, Zhi Hua Wang. 176-179 [doi]
• A new algorithm for high speed speech and audio codingÜmit Güz, Hakan Gürkan, B. Siddik Yarman. 180-183 [doi]
• A study on the best wavelet filter bank problem in the wavelet-based image watermarkingAkio Miyazaki. 184-187 [doi]
• Least-square-based block adaptive prediction approach for lossless image codingShuitsu Matsumura, Takuji Maezawa, Daisuke Takago, Kyoko Kato, Tsuyoshi Takebe. 188-191 [doi]
• A comparison between the message embedded cryptosystem and the self-synchronous stream cipher MosquitoPhuoc Vo Tan, Gilles Millerioux, Jamal Daafouz. 192-195 [doi]
• 1V 10-bit successive approximation ADC for low power biomedical applicationsHwang-Cherng Chow, Yi-Hung Chen. 196-199 [doi]
• An adaptive circuit for low-power sensor processing: Mismatch effectsNicolás Medrano, Maria Teresa Sanz, Pedro A. Martínez, Santiago Celma, Guillermo Zatorre. 200-203 [doi]
• Recent advances in the design of implantable stimulator output stagesXiao Liu 0001, Andreas Demosthenous, Mohamad Rahal, Nick Donaldson. 204-207 [doi]
• Floating voltage-controlled current sources for electrical impedance tomographyHongwei Hong, Mohamad Rahal, Andreas Demosthenous, Richard H. Bayford. 208-211 [doi]
• Distortion analysis in the frequency domain of a Gm-C biquadGaetano Palumbo, Melita Pennisi, Salvatore Pennisi. 212-215 [doi]
• Linearity guidelines for gm-C biquad filter design using architecture optimization with Volterra analysisPieter Crombez, Jan Craninckx, Piet Wambacq, Michiel Steyaert. 216-219 [doi]
• Nonlinear on-chip capacitor characterizationTomas Sutory, Zdenek Kolka, Dalibor Biolek, Viera Biolková. 220-223 [doi]
• A generalization of Miller formulae for nonlinear feedback networksGiuseppe Di Cataldo, Gaetano Palumbo, Melita Pennisi, Salvatore Pennisi. 224-227 [doi]
• 12-bit 2.4 GHz D/A upconverterVesa Turunen, Tero Nieminen, Marko Kosunen, Kari Halonen. 228-231 [doi]
• A two-step dynamic reference A/D converterDanping Li, Liter Siek. 232-235 [doi]
• Analog calibration of channel mismatches in time-interleaved ADCsPieter Harpe, Hans Hegt, Arthur H. M. van Roermund. 236-239 [doi]
• Thermometer-to-binary decoders for flash analog-to-digital convertersErik Sall, Mark Vesterbacka. 240-243 [doi]
• Simultaneous estimation of gain, delay, and offset utilizing the farrow structureMattias Olsson, Håkan Johansson, Per Löwenborg. 244-247 [doi]
• An arbitrary-bandwidth transmultiplexer and its application to flexible frequency-band reallocation networksAmir Eghbali, Håkan Johansson, Per Löwenborg. 248-251 [doi]
• Minimum number of operations under a general number representation for digital filter synthesisLevent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José C. Monteiro. 252-255 [doi]
• Design of an efficient digital down-converter for a SDR-based DVB-S receiverA. Perez-Pascual, T. Sansaloni, V. Torres, Vicenç Almenar, Javier Valls. 256-259 [doi]
• A broadband, inductorless LNA for multi-standard aplicationsMaja Vidojkovic, Mihai Sanduleanu, Johan van der Tang, Peter G. M. Baltus, Arthur H. M. van Roermund. 260-263 [doi]
• Gain-Bandwidth Limitations of 0.18μm Si-CMOS RF technologyB. Siddik Yarman, Nicodimus Retdian, Shigetaka Takagi, Nobuo Fujii. 264-267 [doi]
• Design optimization of staggered amplifier for wide-band applicationsNicodimus Retdian, Shigetaka Takagi, Nobuo Fujii. 268-271 [doi]
• On the optimal design of multi-stage cascaded transistor amplifiers with noise, gain and mismatch constraintsEnrico F. Calandra, Bruno Di Maio, Daniele Lupo. 272-275 [doi]
• CNN model on cell multiprocessor arrayZoltán Nagy, László Kék, Zoltán Kincses, Péter Szolgay. 276-279 [doi]
• An FPGA implementation Of 2-D CNN gabor-type filterErtugrul Saatci, Evren Cesur, Vedat Tavsanoglu, Izzet Kale. 280-283 [doi]
• CNN-UM based transversely isotropic elastic wave propagation simulationPeter Sonkoly, Istvan Noe, J. M. Carcione, Zoltan Nagy, Péter Szolgay. 284-287 [doi]
• Emulated digital CNN solution for two dimensional compressible flowsSándor Kocsardi, Zoltan Nagy, Péter Szolgay. 288-291 [doi]
• Design of bio-inspired network models for spatio-temporal pattern identificationFernando Corinto, Valentina Lanza, Marco Gilli. 292-295 [doi]
• Dynamics of EEG-signals in epilepsy: Spatio temporal analysis by Cellular Nonlinear NetworksChristian Niederhöfer, Frank Gollas, Ronald Tetzlaff. 296-299 [doi]
• Retinal prosthesis : Testing prototypes on a dystrophic rat retinaJ. Salzmann, J. L. Guyomard, O. P. Linderholm, B. Kolomiets, H. Kasi, Michel Pâques, M. Simonutti, E. Dubus, S. Rosolen, José-Alain Sahel, P. Renaud, Avinoam B. Safran, Serge Picaud. 300-303 [doi]
• Visual homing: Experimental results on an autonomous robotPaolo Arena, Sebastiano De Fiore, Luigi Fortuna, L. Nicolosi, Luca Patané, Guido Vagliasindi. 304-307 [doi]
• Smart, flexible, and future-proof data convertersArthur H. M. van Roermund. 308-319 [doi]
• Ultra low-power MEMS-based radio for wireless sensor networksChristian C. Enz, Jacek Baborowski, Jérémie Chabloz, Martin Kucera, Claude Muller, David Ruffieux, Nicola Scolari. 320-331 [doi]
• New highly-accurate CMOS source-degenerated based V-I converter with positive feedbackJaime Ramírez-Angulo, B. Calvo, Sri Raga Sudha Garimella, Santiago Celma, Maria Teresa Sanz. 332-335 [doi]
• Continuous-time filter featuring Q and frequency on-chip automatic tuningAránzazu Otín, Santiago Celma, Concepción Aldea. 336-339 [doi]
• A CMOS fifth-order 400MHz current-mode LF linear phase filter for hard disk read channelsXi Zhu 0001, Yichuang Sun, James Moritz. 340-343 [doi]
• Design optimization of wave active filtersRichard Stary, Pravoslav Martinek. 344-347 [doi]
• LMS-based calibration of pipelined ADCs including linear and nonlinear errorsRuida Yun, Yajie Qin, Svante Signell. 348-351 [doi]
• Methodology for mismatch reduction in time-interleaved ADCsMichael Soudan, Ronan Farrell. 352-355 [doi]
• Design of a 1.8V 8-bit 500MSPS folding-interpolation CMOS A/D converter with a folder averaging techniqueDongJin Lee, Jaewon Song, Jongha Shin, Sanghoon Hwang, Minkyu Song, Tad Wysocki. 356-359 [doi]
• Analyzing the performance degradation of flash A/D converters due to substrate noise couplingAthanasios Stefanou, Georges G. E. Gielen. 360-363 [doi]
• A high-speed hardware implementation of the Hermes8-128 stream cipherParis Kitsos, Ulrich Kaiser. 364-367 [doi]
• A General Model of DPA Attacks to Precharged Busses in Symmetric-Key Cryptographic AlgorithmsMassimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli. 368-371 [doi]
• Arithmetic and architectural design to reduce leakage in nano-scale digital circuitsPeter Nilsson. 372-375 [doi]
• Current sensing completion detection for subthreshold asynchronous circuitsOmer Can Akgun, Yusuf Leblebici, Eric A. Vittoz. 376-379 [doi]
• OOK/NCP-FSK Modulator based on Coupled Open-Closed-Loop VCOsHervé Barthélemy, Sylvain Bourdel, Jean Gaubert, Stéphane Meillére. 380-383 [doi]
• T1/E1/J1 receiver in CMOSHaizheng Guo, Innes Cathcart, Robert Sobot. 384-387 [doi]
• Envelope tracking power amplifier with static predistortion linearizationHenri Harju, Timo Rautio, Simo Hietakangas, Timo Rahkonen. 388-391 [doi]
• Fundamental blocks of single ended LVCMOS output buffer- a circuit level design guidelinePrasanna Kannan. 392-395 [doi]
• Clocking and WTA design of a continuous time Hopfield net with parasitic capacitancesRuxandra L. Costea, Corneliu A. Marinov. 396-399 [doi]
• A Realization of FIR System Characterizing Outline of Fingers and Its Application to Person IdentificationTakenobu Matsuura, Shuhei Iwanaga, Kaset Sirisantisamrid, Kitti Tirasesth. 400-403 [doi]
• Improved fast encoding method of vector quantization based on dynamic element reordering for codewordsZhibin Pan, Koji Kotani, Tadahiro Ohmi. 404-407 [doi]
• Improvement of watermark detection process based on Bayesian estimationAkio Miyazaki. 408-411 [doi]
• Bioimpedance monitoring with improved accuracy using three-level stimulusToivo Paavle, Paul Annus, Alar Kuusik, Raul Land, Mart Min. 412-415 [doi]
• Analysis of an adaptive algorithm for feedback cancellation in hearing aids for sinusoidal signalsHideaki Sakai. 416-419 [doi]
• EEG signal compression based on Classified Signature and Envelope Vector SetsHakan Gürkan, Ümit Güz, B. Siddik Yarman. 420-423 [doi]
• Discrimination Between Human Functional Ability/Disability by means of Different Classification MethodologiesGiovanni Costantini, Massimo Carota, Giovanni Maccioni, Daniele Giansanti. 424-427 [doi]
• First-order allpass sections-based high-input low output impedance voltage-mode universal filter using FDCCIIsFethi Gur, Fuat Anday. 428-431 [doi]
• SI-biquad based on direct-form digital filtersPravoslav Martínek, Dasa Ticha. 432-435 [doi]
• Single-stage CMOS OTA for active-RC filter designPhanumas Khumsat, Apisak Worapishet. 436-439 [doi]
• CCII-based high-valued inductance simulators with minumum number of active elementsGiuseppe Ferri, Nicola Carlo Guerrini, R. Romanato, Giuseppe Scotti, Alessandro Trifiletti. 440-443 [doi]
• Theoretical and practical minimum of the power Consumption of 3 ADCs in SC techniqueB. Bechen, Ton J. J. van den Boom, Dirk Weiler, Bedrich J. Hosticka. 444-447 [doi]
• Current-mode circuits for sigma-delta convertersUfuk Yapar, Gunhan Dundar. 448-451 [doi]
• Design procedure for optimizing the power consumption of two-stage Miller compensated amplifiers in SC circuitsJesús Ruiz-Amaya, Juan Francisco Fernández-Bootello, Manuel Delgado-Restituto. 452-455 [doi]
• A Sample-and-Hold Circuit with Very Low Gain Error for Time Interleaving ApplicationsFrancesco Centurelli, Andrea Simonetti, Alessandro Trifiletti. 456-459 [doi]
• A Low-Power High-Radix Serial-Parallel MultiplierDanny Crookes, Richard M. Jiang. 460-463 [doi]
• Design of fixed-width multipliers with minimum mean square errorNicola Petra, Davide De Caro, Antonio G. M. Strollo. 464-467 [doi]
• m) MultipliersNicola Petra, Davide De Caro, Antonio G. M. Strollo. 468-471 [doi]
• VHDL implementation of fast NxN multiplier based on vedic mathematicShamim Akhter. 472-475 [doi]
• Implementation of generalized uniform Bandpass Sampling with complex FIR and IIR FilteringYi-Ran Sun, Svante Signell. 476-479 [doi]
• Reconfigurable digital Delta-Sigma Modulator Synthesis for digital wireless transmittersC. Nsiala Nzeza, J. Gorisse, Antoine Frappe, Axel Flament, Andreas Kaiser, Andreia Cathelin. 480-483 [doi]
• A design of multi-GHz continuous-time bandpass filters using 0.1-μm HEMT technologyShunsuke Nakamura, Uichiro Omae, Hiroshi Watanabe, Takao Waho. 484-487 [doi]
• Power amplifiers linearization based on digital predistortion with memory effects used in CDMA applicationsPooria Varahram, Sudhanshu Shekhar Jamuar, Somayeh Mohammady, Mohd Nizar Hamidon, Sabira Khatun. 488-491 [doi]
• An automatic tool to design CNN-UM programsGiovanni Egidio Pazienza, Xavier Vilasís-Cardona, Kristóf Karacs. 492-495 [doi]
• Vision based human-machine interface via hand gesturesNorbert Bérci, Péter Szolgay. 496-499 [doi]
• A CNN-based Algorithm for Moving Object Detection in Stereovision ApplicationsGiovanni Costantini, Daniele Casali, Massimo Carota, Renzo Perfetti. 500-503 [doi]
• On the digital simulation of linear cellular neural networksNerhun Yildiz, Vedat Tavsanoglu. 504-506 [doi]
• An Adaptive Multi-Resolution Algorithm for Motion Estimation in Medical Image SequencesCristian Grava, Adrien Bartoli, Jean-Marc Lavest, Vincent Gay-Bellile, Vasile Buzuloiu. 507-510 [doi]
• On chip implementation of a pixel-parallel approach for retinal vessel tree extractionCarmen Alonso-Montes, Piotr Dudek, David López Vilariño, Manuel G. Penedo. 511-514 [doi]
• Locating and reading color displays with the bionic eyeglassKristóf Karacs, Tamás Roska. 515-518 [doi]
• FPGA Implementation of 3D Discrete Wavelet Transform for Real-Time Medical ImagingRichard M. Jiang, Danny Crookes. 519-522 [doi]
• Low quiescent current high speed amplifier for LCD column driverSalvatore di Fazio, Francesco Pulvirenti, Tiziana Signorelli, Christian Lao, Salvatore Pennisi. 523-526 [doi]
• A rail-to-rail DC-enhanced adaptive biased fully differential OTAGiuseppe Ferri, Vincenzo Stornelli, Andrea De Marcellis, Angelo Celeste. 527-530 [doi]
• Low voltage gain boosting schemes for one stage operational amplifiersJaime Ramírez-Angulo, Annajirao Garimella, Lalitha Mohana Kalyani-Garimella, Milind S. Sawant, Antonio Lopez-Martin, Ramón González Carvajal. 531-534 [doi]
• Sub-1V CMOS OTA with Body-driven Gain BoostingPietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti, Salvatore Pennisi. 535-538 [doi]
• CMOS Miller OTA with Body-Biased Output StageAlfio Dario Grasso, Salvatore Pennisi, Francesco Centurelli, Giuseppe Scotti, Alessandro Trifiletti. 539-542 [doi]
• Combined simplex-trust-region optimization algorithm for automated IC designÁrpád Bürmen, Iztok Fajfar, Tadej Tuma. 543-546 [doi]
• Clustering algorithms for circuit partitioning and placement problemsJianhua Li, Laleh Behjat, Logan Rakai. 547-550 [doi]
• Switched-current filter optimization based on evolutionary algorithmsLukas Dolivka, Jirí Hospodka. 551-554 [doi]
• Designing VFs by applying genetic algorithms from nullator-based descriptionsEsteban Tlelo-Cuautle, Miguel Aurelio Duarte-Villaseñor, Carlos A. Reyes García, Mourad Fakhfakh, Mourad Loulou, Carlos Sánchez-López, Gerardo Reyes Salgado. 555-558 [doi]
• Automated cost function formulation for analog design optimizationLioua Labrak, T. Tixier, Y. Fellah, Nacer Abouchi. 559-562 [doi]
• Optimal dithered digital sigma-delta modulators for fractional-N frequency synthesizersVictor Rodolfo Gonzalez-Diaz, Miguel Angel Garcia-Andrade, Guillermo Espinosa Flores-Verdad. 563-566 [doi]
• A novel dual-loop multi-phase frequency synthesizerZhipeng Ye, Wenbin Chen, Michael Peter Kennedy. 567-570 [doi]
• Optimizing the design of an injection-locked frequency divider by means of nonlinear analysisMohammad M. Ghahramani, Saeid Daneshgar, Michael Peter Kennedy, Oscar De Feo. 571-574 [doi]
• A new method for the determination of the locking range of oscillatorsCarlos E. Christoffersen, Marissa Condon, Tao Xu. 575-578 [doi]
• A circular voltage-controlled phase shifter with unlimited phase range for phase tracking loopsByungjin Chun, Zheyao Zhang, Sverre Lidholm. 579-582 [doi]
• Derivation of power amplifier predistortion circuits by frequency to signal amplitude transformationDafu Bai, David G. Haigh. 583-586 [doi]
• Split-band supply modulator for OFDM polar transmitter: Filter designMikko Talonen, Saska Lindfors. 587-590 [doi]
• Feedthrough cancellation in a class E amplified polar transmitterSimo Hietakangas, Timo Rautio, Timo Rahkonen. 591-594 [doi]
• Ultra-low power 2.4 GHz CMOS receiver front-end for sensor nodesSandeep Kowlgi Srinivasan, Ana Rusu, Mohammed Ismail. 595-598 [doi]
• Improving the quality factor estimation for differentially driven RF CMOS inductorMaria Drakaki, Alkis A. Hatzopoulos, Stylianos Siskos. 599-602 [doi]
• A switching mode power supply with digital pulse density modulation controlSimone Orcioni, Rocco D. d'Aparo, Massimo Conti. 603-606 [doi]
• Linear-Assisted Converter with Constant Switching FrequencyHerminio Martinez, Alfonso Conesa. 607-610 [doi]
• Modeling of Linear-Assisted DC-DC ConvertersHerminio Martinez, Alfonso Conesa. 611-614 [doi]
• A discussion on exponential-gain charge pumpLaura Gobbi, Alessandro Cabrini, Guido Torelli. 615-618 [doi]
• Impact of control signal skews on self-boosted charge pumpsAndrea Fantini, Alessandro Cabrini, Guido Torelli. 619-622 [doi]
• Digital post-processing for testable random bit generatorsMarco Bucci, Raimondo Luzzi. 623-626 [doi]
• Second-level testing revisited and applications to NIST SP800-22Fabio Pareschi, Riccardo Rovatti, Gianluca Setti. 627-630 [doi]
• A Study on Random Bit Generators with Post-Processing by Shift Registers and Modulo-2 AdditionAkio Tsuneda, Sho Mitsuishi, Takahiro Inoue. 631-634 [doi]
• On the convergence to regime of ADC-based true random number generatorsRiccardo Rovatti, Sergio Callegari, Gianluca Setti. 635-638 [doi]
• On the generation of pseudo-random sequences exploiting digitized chaotic systemsTommaso Addabbo, Ada Fort, Santina Rocchi, Valerio Vignoli. 639-642 [doi]
• Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiersSalvatore Omar Cannizzaro, Alfio Dario Grasso, Gaetano Palumbo, Salvatore Pennisi. 643-646 [doi]
• Mismatch Tolerant, Continuous Time, Rail to Rail, Gain Enhanced CMOS AmplifiersM. Cianella, Christian Falconi, Arnaldo D'Amico, Giuseppe Scotti, Alessandro Trifiletti. 647-650 [doi]
• Power-constrained Bandwidth Optimization in Cascaded Open-loop AmplifiersFrancesco Centurelli, Pietro Monsurrò, Alessandro Trifiletti. 651-654 [doi]
• Design methodology of nested-Miller amplifiers for small capacitive loadsAndrea Pugliese 0002, Gregorio Cappuccino, Giuseppe Cocorullo. 655-658 [doi]
• Transmission line modelling using wave equation standing-wave solutions as basis functionsAntti Tanskanen. 659-662 [doi]
• A new approach to analysis and simulation of single and coupled low-loss interconnectsAgnieszka Ligocka, Wojciech Bandurski, Piotr Rydlichowski. 663-666 [doi]
• Highly-accurate propagation delay analytical model of an RC-circuit with a ramp inputRosario Mita, Gaetano Palumbo. 667-670 [doi]
• Models for the LE-FDTD resistive voltage source spanning multiple cellsLuis R. J. Costa, Keijo Nikoskinen, Martti Valtonen. 671-674 [doi]
• A design methodology for low-power MCML ring oscillatorsGiuseppe Caruso, Alessio Macchiarella. 675-678 [doi]
• Sorter-based sigma-delta domain arithmetic circuitsTsubasa Katao, Keita Hayashi, Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa. 679-682 [doi]
• Piecewise linear circuits operating on first-order multi-level and second-order binary sigma-delta modulated signalsKeita Hayashi, Tsubasa Katao, Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa. 683-686 [doi]
• Code compression for ARM7 embedded systemsValeria Garofalo, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo. 687-690 [doi]
• Analytical calculation of BER in communication systems using a piecewise linear chaotic mapGeorges Kaddoum, Daniel Roviras, Pascal Chargé, Daniele Fournier-Prunaret. 691-694 [doi]
• The ultimate capacity of MIMO channels and its realizationRuey-Wen Liu, Rendong Ying, Guozhi Xu. 695-698 [doi]
• Low cost error recovery in Delay-Intolerant Wireless Sensor NetworksRachit Agarwal 0001, Emanuel M. Popovici, Massimiliano Sala, Brendan O'Flynn. 699-702 [doi]
• Efficient construction and implementation of short LDPC codes for wireless sensor networksJames McDonagh, Massimiliano Sala, Antoin O'Allmhurain, Vaibhav Katewa, Emanuel M. Popovici. 703-706 [doi]
• Using high pass sigma-delta modulation for Class-S power amplifiersStephen Ralph, Ronan Farrell. 707-710 [doi]
• An efficient parallel structure for ΣΔ modulators for use in high speed switching power amplifiersRonan Farrell. 711-714 [doi]
• Derivation of the sliding domain for a buck-based switching amplifier in wideband signal tracking applicationsLázaro Marco, Eduard Alarcón. 715-718 [doi]
• Using Taylor predictor to improve stabilization of steady state in third-order chaotic systemElena Tamaseviciute, Skaidra Bumeliene, Arünas Tamasevicius. 719-722 [doi]
• Multi-user detection for an asynchronous differential chaos-based multiple access systemMartial Coulon, Daniel Roviras. 723-726 [doi]
• Study of discretization of two-dimensional sliding mode control systemsZbigniew Galias, Xinghuo Yu 0001. 727-730 [doi]
• Limit cycles in Digital Bang-Bang PLLsRaymond Flynn, Orla Feely. 731-734 [doi]
• Nonlinearities: Your worst enemies...? ... Your best friends!Maciej J. Ogorzalek. 735-738 [doi]
• A highly linear low voltage CMOS triode transconductorYaohui Kong, Shuzheng Xu, Huazhong Yang. 739-742 [doi]
• Very Low Voltage CMOS Two-stage AmplifierPietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti, Salvatore Pennisi. 743-746 [doi]
• A low-power multilevel-output classifier circuitMerih Yildiz, Shahram Minaei, Izzet Cem Göknar. 747-750 [doi]
• A low-voltage, low-power, high-linearity cmos four-quadrant analog multiplierChutham Sawigun, Andreas Demosthenous, Dipankar Pal. 751-754 [doi]
• Improved Analytical I-V model for polygonal-shape enclosed layout transistorsP. Lopez, D. Cabello, H. Hauer. 755-758 [doi]
• An algorithm for battery modeling and life time maximization of small size electric systemsMasahiro Fukui, Sayaka Iwakoshi, Tatsuya Koyagi. 759-762 [doi]
• Improved Noise Wave Model of Microwave FETs based on Artificial Neural NetworksZlatica Marinkovic, Olivera Pronic-Rancic, Vera Markovic. 763-766 [doi]
• Multiple adaptive neuro-fuzzy inference systems for accurate microwave CAD applicationsJuan Hinojosa, Ginés Doménech-Asensi. 767-770 [doi]
• Energy consumption in RLC tree circuitsMassimo Alioto, Gaetano Palumbo, Massimo Poli. 771-774 [doi]
• A fast transient simulation based on Model Order Reduction and RLCG-MNA formulationAkira Tsuzaki, Toshio Unno, Yuichi Tanji, Hideki Asai. 775-778 [doi]
• Automated diagnostic system using graph clustering algorithm and fuzzy logic methodPiotr Bilski. 779-782 [doi]
• On reconstruction of conductances in resistor grids from boundary measurementsPiotr Zegarmistrz, Zbigniew Galias. 783-786 [doi]
• Efficient CMOS driver-receiver pair with low-swing signaling for on-chip interconnectsJose C. Garcia, Juan A. Montiel-Nelson, Saeid Nooshabadi. 787-790 [doi]
• Low-power single-ended I/O circuit for binary interchip communicationsFranco Fiori. 791-794 [doi]
• High performance bootstrapped CMOS low to high-swing level-converter for on-chip interconnectsJose C. Garcia, Juan A. Montiel-Nelson, Saeid Nooshabadi. 795-798 [doi]
• Very high-speed carry computation based on mixed dynamic/transmission-gate Full AddersMassimo Alioto, Gaetano Palumbo. 799-802 [doi]
• Global robust stability of bidirectional associative memory neural networksSibel Senan, Sabri Arik, Vedat Tavsanoglu. 803-806 [doi]
• Obtaining decision boundaries of CSFNN neurons using current mode analog circuitryBurcu Erkmen, Tulay Yildirim. 807-810 [doi]
• Scale-rule selection of affordable neural network for chaotic time series learningYoko Uwate, Yoshifumi Nishio, Ruedi Stoop. 811-814 [doi]
• Optimized cellular neural network universal machine emulation on FPGAGiovanni Egidio Pazienza, Jordi Bellana-Camanes, Jordi Riera-Babures, Xavier Vilasís-Cardona, Marco Antonio Moreno-Armendáriz, Marco Balsi. 815-818 [doi]
• Influence of topology on synchronization in networks of coupled Hindmarsh-Rose neuronsPaolo Checco, Mario Biey, Marco Righero. 819-822 [doi]
• Clustering phenomenon of chaotic circuits coupled symmetrically by mutual inductorsYuta Komatsu, Yoko Uwate, Yoshifumi Nishio. 823-826 [doi]
• CMOS circuit implementation of a coupled phase oscillator system using pulse modulation approachDaisuke Atuti, Naoto Kato, Kazuki Nakada, Takashi Morie. 827-830 [doi]
• Analysis of synchronization phenomena in star-coupled Wien-bridge oscillators using distorted wavesSeiichiro Moro, Tadashi Matsumoto 0002. 831-833 [doi]
• A method for multiple fault diagnosis in dynamic analogue circuitsMichal Tadeusiewicz, Piotr Sidyk, Stanislaw Halgas. 834-837 [doi]
• A common-sense based approach to the automated test-point selection in fault diagnosisAndrzej Pulka, Jerzy Rutkowski. 838-841 [doi]
• Polynomial fault diagnosis of linear analog circuitsZygmunt A. Garczarczyk. 842-845 [doi]
• Design and development of a versatile testing system for analog and mixed-signal circuitsMichael G. Dimopoulos, Dimitris K. Papakostas, Alkis A. Hatzopoulos, Evdokimos I. Konstantinidis, Alexios Spyronasios. 846-849 [doi]
• Synthesis of threshold logic circuits using tree matchingTejaswi Gowda, Samuel Leshner, Sarma B. K. Vrudhula, Goran Konjevod. 850-853 [doi]
• Behavioral models of basic mixed-mode circuits: practical issues and applicationWilliam Prodanov, Maurizio Valle, Roman Buzas, Hubert Pierscinski. 854-857 [doi]
• Road map representation of s-expanded symbolic network functionsMarian Pierzchala, Benedykt Rodanski. 858-861 [doi]
• Bluetooth Baseband power analysis with PKtoolGiovanni B. Vece, Simone Orcioni, Massimo Conti. 862-865 [doi]
• A path searching method based on circuit analysis for nonlinear resistive networksMasatoshi Sato, Hisashi Aomori, Mamoru Tanaka. 866-869 [doi]
• Absolute stability of single variable Lur'e systemsRoisin Duignan, Paul F. Curran. 870-873 [doi]
• FPGA implementation of a new scheme for the circuit realization of PWL functionsAlessio Boggiano, Simone Delfitto, Tomaso Poggi, Marco Storace. 874-877 [doi]
• PWL approximation of the Hindmarsh-Rose neuron model in view of its circuit implementationFederico Bizzarri, Daniele Linaro, Marco Storace. 878-881 [doi]
• A small chip area 12-b 300MS/s Current Steering CMOS D/A converter based on a laminated-step layout techniqueByungseung Lee, Byungill Kim, Juneseok Lee, Sanghoon Hwang, Minkyu Song, Tad Wysocki. 882-885 [doi]
• Simulation of quadrature-bandpass Sigma-Delta analog to digital converters using state space descriptionsStefan Joeres, Song-Bok Kim, Stefan Heinen. 886-889 [doi]
• Comparison of active and passive mixersMarkus Voltti, Tero Koivisto, Esa Tiiliharju. 890-893 [doi]
• Design and implementation of a miniaturised, low power wireless sensor nodeSean Harte, Brendan O'Flynn, Rafael V. Martínez Catalá, Emanuel M. Popovici. 894-897 [doi]
• Topological conditions for passive switches in switching convertersMasato Ogata, Tetsuo Nishi. 898-901 [doi]
• A Matlab tool for analysis of switch-mode power suppliesTimo Rahkonen. 902-905 [doi]
• The minimum energetical principle in electric and magnetic circuitsHoria Andrei, Fanica Spinei. 906-909 [doi]
• Analog circuits for thermistor linearization with Chebyshev-optimal linearity errorCarl Renneberg, Torsten Lehmann. 910-913 [doi]
• Closed-Form expression of frequency pulling in unlocked-driven nonlinear oscillatorsPaolo Maffezzoni, Lorenzo Codecasa, Dario D'Amore, Mauro Santomauro. 914-917 [doi]
• Harmonic balance, Melnikov method and nonlinear oscillators under resonant perturbationMichele Bonnin, Fernando Corinto, Marco Gilli, Pier Paolo Civalleri. 918-921 [doi]
• Breakdown of synchronization in chaotic oscillators and noisy oscillatorsRyo Imabayashi, Yoko Uwate, Yoshifumi Nishio. 922-925 [doi]
• An IC implementation of a hysteresis two-port VCCS chaotic oscillatorTakuya Hamada, Yoshihiko Horio, Kazuyuki Aihara. 926-929 [doi]
• Correct operation in SMOBILE-based quasi-differential quantizersJuan Núñez 0002, José M. Quintana, Maria J. Avedillo. 930-933 [doi]
• Single electron transistor based chua type chaotic circuit: A SPICE assisted proofGaurav Gandhi, Tamás Roska, Árpád Csurgay. 934-937 [doi]
• Pipelined array multiplier based on quantum-dot cellular automataIsmo Hänninen, Jarmo Takala. 938-941 [doi]
• Assessing quantum circuits reliability with mutant-based simulated fault injectionOana Boncalo, Mihai Udrescu, Lucian Prodan, Mircea Vladutiu, Alexandru Amaricai. 942-945 [doi]
• SOI pixel detector based on CMOS time-compression charge-injectionDaniel Durini, Werner Brockherde, Bedrich J. Hosticka. 946-949 [doi]
• A collision-free time-to-first spike camera architecture based on a winner-take-all networkNicola Massari, Syed Arsalan Jawed, Massimo Gottardi. 950-953 [doi]
• 3D integrated scalable focal-plane processor arrayPéter Földesy, Ákos Zarándy, Csaba Rekeczky, Tamás Roska. 954-957 [doi]
• A readout system for inductive position sensorsMohamad Rahal, Andreas Demosthenous. 958-961 [doi]
• AN electrical equivalent circuit model For RF MEMS disk resonatorsTimo Veijola. 962-965 [doi]
• FFinder: A MAPLE-based CAD frame for identifying feedback loops in electric circuitsArturo Sarmiento-Reyes, Jacobo Salazar Torres, Luis Hernández-Martínez, Miguel Ángel Gutierrez de Anda. 966-969 [doi]
• Symbolic hybrid analysis of nonlinear analog circuitsLucia Dumitriu, Mihai Iordache, Nicolae Voicu. 970-973 [doi]
• Systematic equation formulationErik Lindberg. 974-977 [doi]
• Applying an iterative-decomposed piecewise-linear model to find multiple operating pointsVíctor Manuel Jimenez-Fernandez, Luis Hernández-Martínez, Arturo Sarmiento-Reyes. 978-981 [doi]
• Finding all the DC solutions of transistor circuits with the thermal constraintMichal Tadeusiewicz, Stanislaw Halgas. 982-985 [doi]
• Noise cancellation and noise minimization techniques for low cost compact size configurable RF oscillators/VCOsUlrich L. Rohde, Ajay K. Poddar. 986-989 [doi]
• Wideband 0.18μm CMOS VCO using active inductor with negative resistanceGrzegorz Szczepkowski, Gerard Baldwin, Ronan Farrell. 990-993 [doi]
• Large-signal analysis of CMOS - LC VCOsAntonio Buonomo, Alessandro Lo Schiavo. 994-997 [doi]
• Self-injection locked compact coupled planar resoator based cost-effective ultra low phase noise VCOs For wireless systemsUlrich L. Rohde, Ajay K. Poddar. 998-1001 [doi]
• A numerical technique for time domain noise analysis of oscillatorsMark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, Kiran K. Gullapalli, Brian J. Mulvaney. 1002-1005 [doi]
• Analysis of switching effects in DC-DC converters via bias point computationDalibor Biolek, Viera Biolková, Zdenek Kolka. 1006-1009 [doi]
• Classification of parallel DC/DC converters part I: circuit theoryYuehui Huang, Chi K. Tse. 1010-1013 [doi]
• Classification of parallel DC/DC converters part II: Comparisons and experimental verificationsYuehui Huang, Chi K. Tse. 1014-1017 [doi]
• Ripple-based Period-2 bifurcation border detection in switching power regulatorsE. Rodriguez-Vilamitjana, A. Poveda, A. El-Aroudi, E. Alarcon. 1018-1021 [doi]
• Four-quadrant switch-mode gyratorCenk Dincbakir, M. Oruc Bilgic. 1022-1025 [doi]
• High frequency chaos oscillators with applicationsAhmet Samil Demirkol, Vedat Tavas, Serdar Özoguz, Ali Toker. 1026-1029 [doi]
• Chaotic dynamics of the fractional Chua's circuit: Time-domain analysis via decomposition methodDonato Cafagna, Giuseppe Grassi. 1030-1033 [doi]
• The bifurcation behaviour of a novel second order model of the Hodgkin-Huxley NeuronCaitriona Boushel, Paul Curran. 1034-1037 [doi]
• Some more robustness conditions for the invariant density of a class of 1D maps under additive noiseSergio Callegari. 1038-1041 [doi]