Table of Contents

• An efficient thermal estimation scheme for microprocessorsPei Shu Huang, Quan-Chung Chen, Chen-Wei Huang, Shiao Li Tsao. 1-10 [doi]
• Non-volatile registers aware instruction selection for embedded systemsMimi Xie, Chen Pan, Jingtong Hu, Chun Jason Xue, Qingfeng Zhuge. 1-9 [doi]
• Minimum-cost data allocation with guaranteed probability on multiple types of memoryShouzhen Gu, Qingfeng Zhuge, Jingtong Hu, Juan Yi, Edwin Hsing-Mean Sha. 1-9 [doi]
• Performance improvement in mesh-based optical networks-on-chipWei-Lun Zhao, Yiyuan Xie, Hong-Jun Che, Ye-Xiong Huang, Weihua Xu, Xin Li, Jia-Chao Li. 1-6 [doi]
• A plasmonic refractive index sensor based on a MIM waveguide with a side-coupled nanodisk resonatorYe-Xiong Huang, Yiyuan Xie, Wei-Lun Zhao, Hong-Jun Che, Weihua Xu, Xin Li, Jia-Chao Li. 1-5 [doi]
• Power minimization for parallel real-time systems with malleable jobs and homogeneous frequenciesAntonio Paolillo, Joël Goossens, Pradeep M. Hettiarachchi, Nathan Fisher. 1-10 [doi]
• An evaluation of code generation of dataflow languages on manycore architecturesSuleyman Savas, Essayas Gebrewahid, Zain-ul-Abdin, Tomas Nordström, Mingkun Yang. 1-9 [doi]
• A context aware cache controller to bridge the gap between theory and practice in real-time systemsYannick Allard, Geoffrey Nelissen, Joël Goossens, Dragomir Milojevic. 1-10 [doi]
• Times square - marriage of real-time and logical-time in GALS and synchronous languagesHeeJong Park, Avinash Malik, Zoran A. Salcic. 1-10 [doi]
• Design and implementation of gaze tracking system with iPadJiajin Zhang, Liu Di, Lichang Chen. 1-5 [doi]
• Keynote: "High throughput computing data center"Qinfen Hao. 1 [doi]
• Energy efficient routing techniques with guaranteed reliability based on multi-level uncertain graphWendi Nie, Yaoxin Duan, Kaijie Wu, Qingfeng Zhuge, Edwin Hsing-Mean Sha. 1-9 [doi]
• Network-Harmonized Scheduling for multi-application sensor networksVikram Gupta, Nuno Pereira, Shashank Gaur, Eduardo Tovar, Ragunathan Rajkumar. 1-10 [doi]
• Light-PREM: Automated software refactoring for predictable execution on COTS embedded systemsRenato Mancuso, Roman Dudko, Marco Caccamo. 1-10 [doi]
• Multi-objective aware design flow for coarse-grained systems on chipPeng Chen 0004, Chao Wang, Xi Li, Xuehai Zhou. 1-8 [doi]
• Workload migration framework for streaming applications on smartphonesChi-Sheng Shih, Shun-Min Wang, Joen Chen, Yu-Hsin Wang. 1-8 [doi]
• TACO: A scalable framework for timing analysis and code optimization of synchronous programsZhenmin Li, Avinash Malik, Zoran A. Salcic. 1-8 [doi]
• Messages from the conference chairsEdwin Hsing-Mean Sha, Jorg Henkel, Kaijie Wu, Tarek F. Abdelzaher, Hojung Cha. 1 [doi]
• The Trajectory approach for AFDX FIFO networks revisited and correctedXiaoting Li, Olivier Cros, Laurent George. 1-10 [doi]
• Component-based analysis of hierarchical scheduling using linear hybrid automataYoucheng Sun, Giuseppe Lipari, Romain Soulat, Laurent Fribourg, Nicolas Markey. 1-10 [doi]
• An implementation of partitioned scheduling scheme for hard real-time tasks in multicore Linux with fair share for Linux tasksN. Saranya, R. C. Hansdah. 1-9 [doi]
• A dynamic covering algorithm of wireless sensor network based on CVTHongxing Wei, Qiang Mao. 1-6 [doi]
• Keynote: "Non-volatile memory innovation"Tei-Wei Kuo. 1 [doi]
• Dynamic tail packing to optimize space utilization of file systems in embedded computing systemsNien-I Hsu, Tseng-Yi Chen, Yuan-Hao Chang, Hsin-Wen Wei, Wei Kuan Shih, Norman Chang. 1-10 [doi]
• A hardware-software co-design experiments platform for NAND flash based on ZynqDebao Wei, Youhua Gong, Liyan Qiao, Libao Deng. 1-7 [doi]
• CCM: Low cost dynamic data exchange to emulate RAM on NAND flashJunhua Zhao, Hejun Wu, Yongjian Zhao, Weiwei Liu. 1-9 [doi]
• A management architecture of cloud server systemsHua Nie, Gongbo Li, Xingkui Liu, Xiaojun Yang, Keping Long. 1-7 [doi]
• Minimizing response times of automotive dataflows on multicoreGlenn A. Elliott, Namhoon Kim, Jeremy P. Erickson, Cong Liu, James H. Anderson. 1-10 [doi]
• A hardware architecture to deploy complex multiprocessor scheduling algorithmsRenato Mancuso, Prakalp Srivastava, Deming Chen, Marco Caccamo. 1-10 [doi]
• Worst-case communication delay analysis for many-cores using a Limited Migrative ModelBorislav Nikolic, Patrick Meumeu Yomsi, Stefan M. Petters. 1-10 [doi]
• Energy efficient real-time task scheduling for embedded systems with hybrid main memoryZhiyong Zhang, Peng Liu, Lei Ju, Zhiping Jia. 1-10 [doi]
• Performance isolation for real-time systems with Xen hypervisor on multi-coresWei Jing, Nan Guan, Wang Yi 0001. 1-7 [doi]
• Design and implementation of a multi-node wifi heart rate variability analysis systemKai Li, Xin Wang, Jianhua Shen. 1-6 [doi]
• Impact analysis for timing requirements on real-time systemsTayfun Gezgin, Stefan Henkler, Ingo Stierand, Achim Rettberg. 1-10 [doi]
• Direct handling of infeasible paths in the event dependency analysisKilian Kempf, Frank Slomka. 1-10 [doi]
• An adaptive server-based scheduling framework with capacity reclaiming and borrowingMeng Liu, Moris Behnam, Shinpei Kato, Thomas Nolte. 1-10 [doi]
• Towards scalable, fair and robust data dissemination via cooperative vehicular communicationsKai Liu, Joseph Kee-Yin Ng, Victor C. S. Lee, Weiwei Wu, Sang Hyuk Son. 1-9 [doi]
• Partitioned multiprocessor scheduling of mixed-criticality parallel jobsGuangdong Liu, Ying Lu, Shige Wang, Zonghua Gu. 1-10 [doi]
• A mixed critical memory controller using bank privatization and fixed priority schedulingLeonardo Ecco, Sebastian Tobuschat, Selma Saidi, Rolf Ernst. 1-10 [doi]
• Federated scheduling for stochastic parallel real-time tasksJing Li, Kunal Agrawal, Christopher D. Gill, Chenyang Lu. 1-10 [doi]
• Wear-leveling for PCM main memory on embedded system via page management and process schedulingChen Pan, Mimi Xie, Jingtong Hu, Meikang Qiu, Qingfeng Zhuge. 1-9 [doi]
• An energy efficient OpenCL implementation of a fingerprint verification system on heterogeneous mobile deviceZhi Qi, Wen Wen, Wei Meng, Ya Zhang, Longxing Shi. 1-8 [doi]
• Optimal and fast composition of resource-sharing components in hierarchical real-time systemsMartijn M. H. P. van den Heuvel, Moris Behnam, Reinder J. Bril, Johan J. Lukkien, Thomas Nolte. 1-12 [doi]
• A dynamic virtual memory management under real-time constraintsMartin Böhnert, Christoph Scholl. 1-10 [doi]
• A real-time distributed hash tableTao Qian, Frank Mueller, Yufeng Xin. 1-10 [doi]
• Optimal semi-partitioned scheduling in soft real-time systemsJames H. Anderson, Jeremy P. Erickson, UmaMaheswari C. Devi, Benjamin N. Casses. 1-10 [doi]
• Computation offloading for sporadic real-time tasksAnas Toma, Jian-Jia Chen, Wei Liu. 1-10 [doi]
• Memory power optimization on different memory address mapping schemasZongwei Zhu, Xi Li, Chao Wang, Xuehai Zhou. 1-9 [doi]
• Deadline-aware load balancing for MapReduceZhao-Rong Lai, Che-Wei Chang, Xue Liu, Tei-Wei Kuo, Pi-Cheng Hsiu. 1-10 [doi]
• Static WCET analysis of the H.264/AVC decoder exploiting coding informationChen-Wei Huang, Timon Kelter, Bjoern Boenninghoff, Jan C. Kleinsorge, Michael Engel, Peter Marwedel, Shiao Li Tsao. 1-7 [doi]
• Contention-aware task and communication co-scheduling for network-on-chip based Multiprocessor System-on-ChipLei Yang, Weichen Liu, Weiwen Jiang, Juan Yi, Duo Liu, Qingfeng Zhuge. 1-8 [doi]
• A task-level superscalar microarchitecture for large scale chip multiprocessorsJianqing Xiao, Pengwei Lv, Mian Lou, Xunying Zhang, XuBang Shen. 1-8 [doi]
• Effects of structured parallelism by parallel design patterns on embedded hard real-time systemsRalf Jahr, Mike Gerdes, Theo Ungerer, Haluk Ozaktas, Christine Rochange, Pavel G. Zaykov. 1-10 [doi]
• Operating system support to an online hardware-software co-design scheduler for heterogeneous multicore architecturesMaikon A. F. Bueno, José A. M. de Holanda, Erinaldo Pereira, Eduardo Marques. 1-10 [doi]
• Improving the response time analysis of global fixed-priority multiprocessor schedulingYoucheng Sun, Giuseppe Lipari, Nan Guan, Wang Yi 0001. 1-9 [doi]
• Reduced buffering solution for multi-hop HaRTES switched Ethernet networksMohammad Ashjaei, Moris Behnam, Paulo Pedreiras, Reinder J. Bril, Luís Almeida, Thomas Nolte. 1-10 [doi]
• A memory schedule policy oriented to stream architectureChiyuan Ma, Xiaoqiang Ni. 1-5 [doi]
• Service guarantee exploration for mixed-criticality systemsHang Su, Nan Guan, Dakai Zhu. 1-10 [doi]
• PUMA: Pseudo unified memory architecture for single-ISA heterogeneous multi-core systemsGangyong Jia, Liang Shi, Jian Wan, Youwei Yuan, Xi Li, Dong Dai. 1-10 [doi]
• Performance optimization in Torus-based optical networks-on-chipWeihua Xu, Yiyuan Xie, Hong-Jun Che, Weilun Zhao, Ye-Xiong Huang, Xin Li, Jia-Chao Li. 1-6 [doi]
• Hazard analysis for AADL modelXiaomin Wei, Yunwei Dong, Mengmeng Yang, Ning Hu, Hong Ye. 1-10 [doi]
• The acceleration of pipeline workloads under the FPGA area and bandwidth constraintsWei-Ning Huang, Sheng-Wei Cheng, Che-Wei Chang, Yu-Chen Wu, Tei-Wei Kuo, Yung-Chin Hsu, Wen-Yih Isaac Tseng, Shih-Hao Hung. 1-9 [doi]
• Adaptive dynamic power management for hard real-time pipelined Multiprocessor SystemsGang Chen, Kai Huang, Alois Knoll. 1-10 [doi]
• On self-timed ring for consistent mapping and maximum throughputWeiwen Jiang, Qingfeng Zhuge, Juan Yi, Lei Yang, Edwin Hsing-Mean Sha. 1-9 [doi]
• Schedulability analysis of Ethernet AVB switchesUnmesh D. Bordoloi, Amir Aminifar, Petru Eles, Zebo Peng. 1-10 [doi]
• Current-aware scheduling for flash storage devicesTzu-Jung Huang, Chien-Chung Ho, Po-Chun Huang, Yuan-Hao Chang, Che-Wei Chang, Tei-Wei Kuo. 1-10 [doi]
• Enhancing lifetime of NVM-based main memory with bit shifting and flippingXianlu Luo, Duo Liu, Kan Zhong, Dan Zhang, Yi Lin, Jie Dai, Weichen Liu. 1-7 [doi]
• Energy-efficient allocation of real-time applications onto Heterogeneous ProcessorsAlexei Colin, Arvind Kandhalu, Ragunathan Rajkumar. 1-10 [doi]