Linear Systems

Meacham Bridge Crystal Sine Wave Oscillator – Low Distortion, 50, 100 and 200 kHz The JFET version of the Meacham Bridge Crystal Sine Wave Oscillator is based on a tube version that was developed in 1938. In that design the crystal had a Q of 104,000.  The original circuit complete with mathematical analysis is described in the Bell Technical Journal October (1938). That design uses a high mu tube with tuned input and output transformers and uses a filament controlled lamp for the variable resistor element. The original design was noted for high frequency, amplitude and temperature stabilization as well as low distortion (sine wave purity). Designs based on the Meacham circuit have frequency stability in the order of 1 part in 10,000,000 over extended temperature ranges. They have such high performance, which depends a great deal on the crystal cut, that they are used in atomic clocks for precise time keeping and to accurately determine the nature of atomic elements. For this design it is recommended that the quartz crystal be cut for operation in series-resonant mode. The specific circuit is designed for 50KHz low distortion sine wave. It can be modified easily for 100 and 200KHz operation. Other applications include clock generators. The bridge network uses a N-Channel JFET. Although this specific design uses a UHF/VHF radio frequency JFET, ultra-low noise audio JFETs could also be used. A JFET with a forward transconductance in the order of 3 to 6.5mS, an IDSS in the range of 2 to 20mA and a Vgs(off) less than -8V would be viable for this design. Higher gain JFETs such as the ultra-low noise LSK170 JFET are another possibility. Alternately, a J310 RF UHF/VHF JFET could also be used. In oscillators different JFETs because of different operating parameters can have major effects on oscillator performance for different applications. Harmonic generation and elimination can play an important role in the design. Source: K. J. Peter, Stable Low-Distortion Bridge Oscillator, EDN, IEEE Magazine, Nov. 15, 1971, p 50-51. 🔗 Explore industry-leading FETs at www.linearsystems.com 💡 Stay tuned for more #FETFriday updates by following us on LinkedIn! #LinearSystems #LowNoiseJFETs #FET #Electronics #Engineering

ASTABLE OSCILLATOR USING JFET – VERY LOW FREQUENCY This astable oscillator design operates at 0.05 Hz, generating a very low-frequency square wave. The oscillation frequency is primarily controlled by the time constants of C1/R4 and C2/R3, with R4 fine-tuning the frequency. The duty cycle and frequency are directly influenced by these RC networks. To activate the oscillator, the S1 switch must be closed—though an electronic switch can easily replace the manual push button for automated control. The circuit uses LSK170 ultra-low-noise JFETs, but it will also function with most general-purpose JFETs, provided they offer sufficient transconductance to sustain oscillation. Learn more about astable oscillators: https://lnkd.in/gV8xedDu 🔗 Explore industry-leading FETs: www.linearsystems.com 💡 Follow us for more #FETFriday designs! #LinearSystems #LowNoiseJFETs #FET #Electronics #Engineering #CircuitDesign #Oscillator

🔊 AUDIO AMPLIFIER – HIGH GAIN, LOW COMPONENT COUNT MU AMP 🔊 In this Mu (µ) amplifier, the voltage gain is determined by the forward transconductance and output conductance of the JFETs. Higher forward transconductance and lower output conductance result in greater voltage gain. Output conductance is directly related to gate-to-source biasing—biasing near zero volts yields the highest conductance, while biasing closer to the Vgs(off) specification minimizes it. You can control the output conductance with the V+ supply or by adjusting the resistors in the voltage divider bias network. 📄 Source: https://lnkd.in/gKQfPCmT 🔗 Explore industry-leading FETs at www.linearsystems.com 💡 Stay tuned for more #FETFriday updates by following us on LinkedIn! #LinearSystems #LowNoiseJFETs #FET #Electronics #Engineering

LOW FREQUENCY HIGH-INPUT-IMPEDANCE AMPLIFIER Introducing a low-frequency, high-input impedance amplifier designed for exceptional noise performance, potentially the lowest ever reported! This design operates across 0.07 Hz to 110 kHz (-3 dB bandwidth) with a high gain of 83 dB. ✅ Optimized Low-Noise Architecture: • JFET Preamplifier Stage (Q1): Provides high input impedance and minimizes noise contribution. • Multi-Stage Amplifier (U1, Q2, Q3, Q4): Enhances signal gain while controlling noise across the frequency range. • Precision Noise Performance: 5.6 nV/√Hz @ 0.1 Hz 1.4 nV/√Hz @ 1 Hz 0.6 nV/√Hz @ 10 Hz 0.5 nV/√Hz @ 1000 Hz 🔍 Comprehensive Noise Analysis The amplifier has been analyzed for noise contributions from active sources (transistors & op-amps), capacitive coupling, and low-impedance signal paths. The design strategically minimizes thermal and flicker noise to achieve ultra-low noise across its bandwidth. 🚀 Explore industry-leading FETs at www.linearsystems.com 🔹 Stay tuned for more #FETFriday updates by following us on LinkedIn! #LowNoise #AmplifierDesign #JFET #PrecisionElectronics #AnalogDesign

Unity Gain Bootstrap Amplifier   The unity gain amplifier (gain of 0.99) is for audio applications where a high input impedance is also needed. In this arrangement a source follower (common drain) with a gain of about one, drives an emitter follower, also with a gain of about one. C2, a 100µF capacitor is the bootstrapped component. The bootstrap capacitor increases the R3’s impedance to 1000MOhms. The JFET’s input impedance is effectively 500 MOhms plus the input impedance as a result of a 10pF gate to source capacitance. Explore industry-leading FETs at www.linearsystems.com Stay tuned for more #FETFriday updates by following us on LinkedIn! #UnityGainAmplifier #BootstrapAmplifier #LinearSystems #LowNoiseJFETs #FET #Electronics #Innovation #Engineering

🔘 Switches: Exploring the T-Switch Topology 🔘 We've shared several variations of switches, and as you may know, switches come in many forms and can be implemented in various ways using JFETs. ⚙️ T-Switch N-Channel The T-Switch is a widely used switch topology, commonly applied in audio and video applications to enhance isolation and minimize insertion loss. This design features three JFET transistors and a control circuit. The control circuit operates such that when the control input is low, one output of the control circuit is set to Vgs(off) volts, while the other remains at 0 V. This configuration ensures that: ➡️ When J3 is off, J1 and J2 turn on, allowing the input signal to pass through to the output. ➡️ When J3 is on, J1 and J2 turn off, shorting any attenuated signal to ground, effectively isolating the input from the output. 📊 The diagram below illustrates a T-Switch based on the J111 N-Channel JFET switch. ⚡ Discover industry-leading FETs at Linear Systems: www.linearsystems.com. 📢 Stay tuned for more #FETFriday posts by following us on LinkedIn! #LowNoiseJFETs #FET #Electronics #Innovation #Engineering #LinearSystems

We're excited to announce that Mike Ansberry has been named VP of Manufacturing and General Manager at Linear Integrated Systems! With his extensive experience and proven leadership, Mike will play a key role in driving operational excellence and supporting our commitment to delivering high-quality products to our customers. https://lnkd.in/gbcnTuHs

We’d like to take this opportunity to thank our valued customers, partners, and colleagues for your continued support throughout the year. Please note that Linear Systems will be closed for the holiday season and will reopen on January 6th. During this time, we hope you also enjoy rest and time with loved ones. We look forward to reconnecting in the new year and continuing to work together on exciting opportunities ahead. Warm wishes, The Linear Systems Team

🌟 FET Friday Teaser: Exciting News! 🌟 We hope you've been enjoying our weekly FET Friday posts—each one has been a small glimpse into the wealth of knowledge contained in our upcoming book, JFET Circuit Design: A Schematics Library. 📘 Coming January 2025: This is the first edition of our JFET book, a collection of unique and versatile circuit designs showcasing the incredible potential of JFETs. It's not just a book; it's a resource for the engineering community, a tool for learning, and a celebration of the often-overlooked Junction Field Effect Transistor. ✨ We’re thrilled to share this with you, knowing it may contain some errors but eager to gather your feedback as we aim for an even better second edition. Your comments, corrections, and suggestions are invaluable in shaping the future of this project. In the meantime, here’s an excerpt from the Foreword by Bob Dobkin, Co-Founder of Linear Technology Corporation: “The JFET stands out as a venerable yet often overlooked device that has been part of semiconductor technology since its early days. By understanding and leveraging the strengths of the JFET, engineers can tackle complex problems that might otherwise seem insurmountable. This book serves as a guide to exploring those possibilities, advocating for the JFET as an essential tool in the engineer's toolkit.” Stay tuned for more FET Friday posts—and mark your calendars for January 2025. Together, let’s rediscover the JFET and make it a centerpiece of innovative circuit design! #JFETBook #FETFriday #JFETCircuitDesign #AnalogEngineering

Exciting news from Linear Integrated Systems! 🎉 We’ve expanded our Custom Testing Services to give designers even greater optimization and flexibility when working with our small-signal discrete products. Whether you need tailored specifications for JFETs, MOSFETs, transistors, or diodes, we’re here to help you push beyond standard data sheet limits and streamline your design process. Learn more about how our enhanced services can benefit your next project: https://lnkd.in/eu2X9YYA #Semiconductors #CustomTesting #Engineering #Innovation #LinearSystems #ElectronicsDesign