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SCHMID GROUP TAKES NEXT STEP TOWARDS ADVANCED PACKAGING FOR INTEGRATED CIRCUITS WITH GLASS CORES

The ASIC package hosting multiple chiplets typically consists of an organic substrate. This is made from resins (mostly glass-reinforced epoxy laminates) or plastics. Depending on packaging technology, either the chips are mounted directly on the substrate, or there is another layer of silicon interposer between them for high-speed connectivity between the chiplets. Interconnect bridges instead of interposers are sometimes embedded inside the substrate to provide this high-speed connectivity.

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Years of dedication and innovation in soft, flexible electronics have led our team to identify seven key features that set the foundation for cutting-edge, sustainable electronics. 💡 These pillars are: Drape and Crease, Sustainability (eschewing silver and etchants), Stretchability, Scalability, Circuit Design Freedom, and Layering. These features are meticulously chosen to ensure mechanical stability, versatile electrical design, and environmental sustainability, allowing products to excel in real-world applications while minimizing their impact on our planet. We've compiled a detailed comparative analysis that dives into why these seven aspects are crucial for the next generation of electronics. We're eager to hear your insights and engage in a dialogue. What are your thoughts on our selected seven features? Let's reshape the future of electronics together. #SoftElectronics #Sustainability #Innovation #FutureTech

Packaging technology is advancing at an unprecedented pace, and the industry is receiving significant investment and attention. The process is becoming increasingly finer, and microscopes are increasingly being used to ensure precision. If you're interested in learning about the direction of technological development in the packaging industry and various packaging technologies, check out this informative article: https://lnkd.in/gq8UTk3q.

ITEC, the Dutch assembly equipment spinout of Philips and Nexperia, has made a groundbreaking advancement in semiconductor assembly technology with the development of a flip-chip die bonder that boasts speeds up to 5 times faster than current systems. The significant increase in speed, allowing for flip-chip die bonding at a rate of 60,000 units per hour, has the potential to drive down assembly costs and accelerate the adoption of this innovative technology, according to ITEC. #electricalengineering #electronics #embedded #embeddedsystems #electrical #computerchips Follow us on LinkedIn to get daily news: HardwareBee - Electronic News and Vendor Directory

Glass substrates offer unparalleled flatness and thermal properties that are fundamental to the next generation of compact, high-performance packaging. Learn more via Semiconductor Engineering, where Teradyne’s Mark Kahwati shares how thermal balance can optimize throughput and minimize test cost: https://bit.ly/3UucG50

Whether for added convenience, a more aesthetically pleasing design, or to save weight and space, #miniaturization has become the common goal among companies in many industries, especially as it relates to micro-optics.   Adhesives and imprint resins continue to enable ever-smaller optical packages and are increasingly used among different sectors, ranging from consumer cameras to automotive lighting. At the same time, miniaturization only increases the reliability standards for polymers.   Experts from DELO will be in attendance at the EPIC - EUROPEAN PHOTONICS INDUSTRY CONSORTIUM meeting on Photonics for Miniaturized Optics on September 18-19, where they will speak on the latest advancements in improving #reliability of optical-grade #polymers. These high-tech, fully transparent materials show virtually no loss in transmission, even after harsh reliability tests like temperature-humidity storage, combined UV and heat exposure, or even reflow processes.   We hope to see you there!

Explore how #semiconductor Towards Packaging is shaping the future of #technology in our latest article. Discover #innovations driving advancements in miniaturization, performance, and integration, and understand their impact on tomorrow's tech landscape. #powerelectronics #powermanagement #powersemiconductor

How much of the market will glass substrates take from organic PCBs? They are flatter and have a lower TCE, closer to silicon despite their higher cost. They are being adopted in many chiplet schemes. #glass #PCB #chiplets #3DIC #semiconductors #substrates Marcelo Zuffo Jake Brolsma Joshua Kemplin Robert Quinn https://lnkd.in/gyHEZ4Tc