Abstract is missing.
- A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSIIsamu Kajitani, Tsutomu Hoshino, Daisuke Nishikawa, Hiroshi Yokoi, Shougo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Masaya Iwata, Didier Keymeulen, Tetsuya Higuchi. 1-12 [doi]
- On the Automatic Design of Robust Electronics Through Artificial EvolutionAdrian Thompson. 13-24 [doi]
- Aspects of Digital Evolution: Geometry and LearningJulian F. Miller, Peter Thomson. 25-35 [doi]
- Evolutionary Design of Hashing Function Circuits Using an FPGAErnesto Damiani, Valentino Liberali, Andrea Tettamanzi. 36-46 [doi]
- A New Research Tool for Intrinsic Hardware EvolutionPaul J. Layzell. 47-56 [doi]
- A Divide-and-Conquer Approach to Evolvable HardwareJim Torresen. 57-65 [doi]
- Evolution of Astable Multivibrators ::::in Silico::::Lorenz Huelsbergen, Edward A. Rietman, Robert Slous. 66-77 [doi]
- Some Aspects of an Evolvable Hardware Approach for Multiple-Valued Combinational Circuit DesignTatiana Kalganova, Julian F. Miller, Terence C. Fogarty. 78-89 [doi]
- Adaptation in Co-evolving Non-uniform Cellular AutomataVesselin K. Vassilev, Terence C. Fogarty. 90-97 [doi]
- Synthesis of Synchronous Sequential Logic Circuits from Partial Input/Output SequencesChaiyasit Manovit, Chatchawit Aporntewan, Prabhas Chongstitvatana. 98-105 [doi]
- Data Compression for Digital Color Electrophotographic Printer with Evolvable HardwareMasaharu Tanaka, Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, Takio Kurita, Tetsuya Higuchi. 106-114 [doi]
- Comparison of Evolutionary Methods for Smoother EvolutionTomofumi Hikage, Hitoshi Hemmi, Katsunori Shimohara. 115-124 [doi]
- Automated Analog Circuit Sythesis Using a Linear RepresentationJason D. Lohn, Silvano Colombano. 125-133 [doi]
- Analogue EHW Chip for Intermediate Frequency FiltersMasahiro Murakawa, Shuji Yoshizawa, Toshio Adachi, Shiro Suzuki, Kaoru Takasuka, Masaya Iwata, Tetsuya Higuchi. 134-143 [doi]
- Intrinsic Circuit Evolution Using Programmable Analogue ArraysStuart J. Flockton, Kevin Sheehan. 144-153 [doi]
- Analog Circuits Evolution in Extrinsic and Intrinsic ModesRicardo Salem Zebulum, Marco Aurélio Cavalcanti Pacheco, Marley B. R. Vellasco. 154-165 [doi]
- Evolvable Hardware for Space ApplicationsAdrian Stoica, Alex S. Fukunaga, Ken Hayworth, Carlos Salazar-Lazaro. 166-173 [doi]
- Embryonics: A Macroscopic View of the Cellular ArchitectureDaniel Mange, André Stauffer, Gianluca Tempesti. 174-184 [doi]
- Embryonics: A Microscopic View of the Molecular ArchitectureDaniel Mange, André Stauffer, Gianluca Tempesti. 185-195 [doi]
- Modeling Cellular Development Using L-SystemsAndré Stauffer, Moshe Sipper. 196-205 [doi]
- MUXTREE Revisited: Embryonics as a Reconfiguration Strategy in Fault-Tolerant Processor ArraysCesar Ortega-Sanchez, Andrew M. Tyrrell. 206-217 [doi]
- Building Complex Systems Using Developmental Process: An Engineering ApproachHiroaki Kitano. 218-229 [doi]
- Evolving Batlike Pinnae for Target Localisation by an EcholocatorHerbert Peremans, V. Ashley Walker, Georgios Papadopoulos, John Hallam. 230-239 [doi]
- A Biologically Inspired Object Tracking SystemRoger DuBois. 240-247 [doi]
- The Modeling Clay Approach to Bio-inspired Electronic HardwareKen Hayworth. 248-255 [doi]
- A Spike Interval Information Coding Representation for ATR s CAM-Brain Machine (CBM)Michael Korkin, Norberto Eiji Nawa, Hugo de Garis. 256-267 [doi]
- Learning in Genetic AlgorithmsErol Gelenbe. 268-279 [doi]
- Back-Propagation Learning of Autonomous Behaviour: A Mobile Robot Khepera Took a Lesson from the Future ConsequencesKazuyuki Murase, Takaharu Wakida, Ryoichi Odagiri, Wei Yu, Hirotaka Akita, Tatsuya Asai. 280-286 [doi]
- SPIKE_4096: A Neural Integrated Circuit for Image SegmentationJean-Luc Rebourg, Jean-Denis Muller, Manuel Samuelides. 287-294 [doi]
- Analysis of the Scenery Perceived by a Real Mobile Robot KheperaRyoichi Odagiri, Wei Yu, Tatsuya Asai, Kazuyuki Murase. 295-302 [doi]
- Evolution of a Control Architecture for a Mobile RobotMarc Ebner. 303-310 [doi]
- Field Programmable Processor ArraysPascal Nussbaum, Bernard Girau, Arnaud Tisserand. 311-322 [doi]
- General-Purpose Computer Architecture Based on Fully Programmable LogicKiyoshi Oguri, Norbert Imlig, Hideyuki Ito, Kouichi Nagami, Ryusuke Konishi, Tsunemichi Shiozawa. 323-334 [doi]
- Palmo: Field Programmable Analogue and Mixed-Signal VLSI for Evolvable HardwareAlister Hamilton, Kostis Papathanasiou, Morgan Tamplin, Thomas Brandtner. 335-344 [doi]
- Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC DevicesJuan Manuel Moreno, Jordi Madrenas, Julio Faura, E. Cantó, Joan Cabestany, Josep Maria Insenser. 345-355 [doi]
- Fault Tolerance of a Large-Scale MIMD Architecture Using a Genetic AlgorithmPhilippe Millet, Jean-Claude Heudin. 356-363 [doi]
- Hardware Evolution with a Massively Parallel Dynamically Reconfigurable Computer: POLYPUwe Tangen, John S. McCaskill. 364-371 [doi]
- Molecular Inference via Unidirectional Chemical ReactionsJan J. Mulawka, Magdalena J. Ocwieja. 372-379 [doi]